Movst0 Flag Load Selected Stf Flags Into St0 - Texas Instruments TMS320C28 series Reference Manual

Instructions
MOVST0 FLAG
Load Selected STF Flags into ST0
Operands
FLAG
Opcode
LSW: 1010 1101
Load selected flags from the STF register into the ST0 register of the 28x CPU where
Description
FLAG is one or more of TF, CI, ZI, ZF, NI, NF, LUF or LVF. The specified flag maps to
the ST0 register as follows:
• Set OV = 1 if LVF or LUF is set. Otherwise clear OV.
• Set N = 1 if NF or NI is set. Otherwise clear N.
• Set Z = 1 if ZF or ZI is set. Otherwise clear Z.
• Set C = 1 if TF is set. Otherwise clear C.
• Set TC = 1 if TF is set. Otherwise clear TF.
If any STF flag is not specified, then the corresponding ST0 register bit is not modified.
Do not use the MOVST0 instruction in the delay slots for pipelined operations. Doing so
Restrictions
can yield invalid results. To avoid this, the proper number of NOPs or non-pipelined
instructions must be inserted before the MOVST0 operation.
; The following is INVALID
; The following is VALID
This instruction modifies the following flags in the STF register:
Flags
Flag
Modified
When the flags are moved to the C28x ST0 register, the LUF or LVF flags are
automatically cleared if selected.
This is a single-cycle instruction.
Pipeline
Program flow is controlled by C28x instructions that read status flags in the status
Example
register 0 (ST0) . If a decision needs to be made based on a floating-point operation, the
information in the STF register needs to be loaded into ST0 flags (Z,N,OV,TC,C) so that
the appropriate branch conditional instruction can be executed. The MOVST0 FLAG
instruction is used to load the current value of specified STF flags into the respective bits
of ST0. When this instruction executes, it will also clear the latched overflow and
underflow flags if those flags are specified.
Loop:
MOV32 mem32, STF
See also
MOV32 STF, mem32
100 Instruction Set
Selected flag
FFFF FFFF
MPYF32 R2H, R1H, R0H
MOVST0 TF
MPYF32 R2H, R1H, R0H
NOP
MOVST0 TF
TF ZI
No No
MOV32 R0H,*XAR4++
MOV32 R1H,*XAR3++
CMPF32 R1H, R0H
MOVST0 ZF, NF
BF Loop, GT ; Loop if (R1H > R0H)
; 2 pipeline-cycle instruction (2p)
; INVALID, do not use MOVST0 in a delay slot
; 2 pipeline-cycle instruction (2p)
; 1 delay cycle, R2H updated after this instruction
; VALID
NI ZF NF
No No No
SPRUEO2A – June 2007 – Revised August 2008
www.ti.com
LUF LVF
Yes Yes
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