Texas Instruments TMS320C28 series Reference Manual page 25

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Example 3-7. Destination Register Conflict
; Invalid delay instruction. Both instructions use the same destination register
MPYF32 R2H, R1H, R0H
MOV32 R2H, mem32
Example 3-8. Destination Register Conflict Resolved
; Valid delay instruction
MPYF32 R2H, R1H, R0H
MOV32 R1H, mem32
Note: Instructions in delay slots cannot use the instruction's destination register as a source
register.
Any operation used for pipeline alignment delay must not use the destination register of the
instruction requiring the delay as a source register as shown in
instructions, the current value of a register can be used in the parallel operation before it is
overwritten as shown in
In Example 3-9 the MPYF32 instruction again uses R2H as its destination register. The next instruction
should not use R2H as its source since the MPYF32 will take an additional cycle to complete. Since the
ADDF32 instruction uses the R2H register a pipeline conflict will be issued by the assembler. This conflict
can be resolved by using a register other than R2H or by inserting a non-conflicting instruction between
the MPYF32 and ADDF32 instructions. Since the SUBF32 does not use R2H this instruction can be
moved before the ADDF32 as shown in
Example 3-9. Destination/Source Register Conflict
; Invalid delay instruction. ADDF32 should not use R2H as a source operand
MPYF32 R2H, R1H, R0H
ADDF32 R3H, R3H, R2H
SUBF32 R4H, R1H, R0H
Example 3-10. Destination/Source Register Conflict Resolved
; Valid delay instruction.
MPYF32 R2H, R1H, R0H
SUBF32 R4H, R1H, R0H
ADDF32 R3H, R3H, R2H
NOP
It should be noted that a source register for the 2nd operation within a parallel instruction can be the same
as the destination register of the first operation. This is because the two operations are started at the
same time. The 2nd operation is not in the delay slot of the first operation. Consider
the MPYF32 uses R2H as its destination register. The MOV32 is the 2nd operation in the instruction and
can freely use R2H as a source register. The contents of R2H before the multiply will be used by MOV32.
SPRUEO2A – June 2007 – Revised August 2008
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; 2p instruction
; Invalid delay instruction
; 2p instruction
; Valid delay
; <-- MPYF32 completes, R2H valid
Example 3-11.
Example 3-10.
; 2p instruction
; Invalid delay instruction
; 2p instruction
; Valid delay for MPYF32
; <-- MPYF32 completes, R2H valid
; <-- SUBF32 completes, R4H valid
Invalid Delay Instructions
Example 3-9. For parallel
Example 3-11 where
Pipeline 25