Minf32 Rah, Rbh 32-Bit Floating-Point Minimum - Texas Instruments TMS320C28 series Reference Manual

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MINF32 RaH, RbH
32-bit Floating-Point Minimum
Operands
RaH
RbH
Opcode
LSW: 1110 0110
MSW: 0000 0000
Description
if(RaH > RbH) RaH = RbH
Special cases for the output from the MINF32 operation:
• NaN output will be converted to infinity
• A denormalized output will be converted to positive zero.
This instruction modifies the following flags in the STF register:
Flags
Flag
Modified
The ZF and NF flags are configured on the result of the operation, not the result stored
in the destination register.
if(RaH == RbH) {ZF=1, NF=0}
if(RaH >
if(RaH <
This is a single-cycle instruction.
Pipeline
Example
MAXF32 RaH, RbH
See also
MAXF32 RaH, #16FHi
MINF32 RaH, #16FHi
MINF32 RaH, RbH || MOV32 RcH, RdH
SPRUEO2A – June 2007 – Revised August 2008
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floating-point source/destination register (R0H to R7H)
floating-point source register (R0H to R7H)
1001 0111
00bb baaa
TF ZI
No No
RbH) {ZF=0, NF=0}
RbH) {ZF=0, NF=1}
MOVIZF32 R0H, #5.0
MOVIZF32 R1H, #4.0
MOVIZF32 R2H, #-1.5
MINF32 R0H, R1H
MINF32 R1H, R2H
MINF32 R2H, R1H
MINF32 R1H, R0H
NI ZF NF
No Yes Yes
; R0H = 5.0 (0x40A00000)
; R1H = 4.0 (0x40800000)
; R2H = -1.5 (0xBFC00000)
; R0H = 4.0, ZF = 0, NF = 0
; R1H = -1.5, ZF = 0, NF = 0
; R2H = -1.5, ZF = 1, NF = 0
; R2H = -1.5, ZF = 0, NF = 1
Instructions
LUF LVF
No No
Instruction Set 75