Tests; Negative Sequence - GE 750 Instruction Manual

CHAPTER 7: COMMISSIONING
7.4.5 Negative-
Sequence
Overcurrent
and Voltage
750 FEEDER MANAGEMENT RELAY – INSTRUCTION MANUAL
Sensitive Ground IOC
The procedure to test this element is identical to that outlined in Phase IOC 1 on page 7–29,
except that the current is injected into the sensitive ground input terminals, and the
element is not subject to the "phases required for operation", "linear reset timing", and
"voltage restrained time overcurrent" tests.
The blocking from logic inputs check is different from that for Phase IOC 1 and is performed
as follows:
 Inject current to cause a pickup.
 Assert a logic input to provide a "Blk Sens Gnd Inst".
The Pickup LED should immediately go out.
 Repeat Steps 1 and 2 for logic inputs "Block Sens Gnd O/C", "Block All
O/C" and "Block 1 Trip Relay" as required.
Sensitive Ground Directional OC
The procedure to test this element is identical to that outlined in Neutral Directional OC on
page 7–33, except that the operating current is the sensitive ground current.
Negative-Sequence TOC
The procedure to test this element is identical to that outlined in Phase TOC 1 on page 7–
25, except that current is injected into any one phase of the phase input terminals and the
negative sequence current magnitude is 1/3rd of the injected current. The element is not
subject to the "phases required for operation" or "voltage restrained time overcurrent"

tests.

The blocking from logic inputs check is different from that for Phase TOC 1 and is
performed as follows:
 Inject current to cause a pickup.
 Assert a logic input to provide a "Block Neg Seq Time".
The Pickup LED should immediately go out.
 Repeat Steps 1 and 2 for logic input "Block All O/C" and "Block 1 Trip
Relay" as required.
Negative-Sequence IOC
The procedure to test this element is identical to that outlined in Phase IOC 1 on page 7–29,
except that current is injected into any one phase of the phase input terminals and the
negative sequence current magnitude is 1/3rd of the injected current. The element is not
subject to the "phases required for operation", "linear reset timing", and "voltage restrained
time overcurrent" tests.
The blocking from logic inputs check is different from that for Phase IOC 1 and is performed
as follows:
 Inject current to cause a pickup.
 Assert a logic input to provide a "Block Neg Seq Inst".
The Pickup LED should immediately go out.
 Repeat Steps 1 and 2 for logic input "Block All O/C" and "Block 1 Trip
Relay" as required.
PROTECTION SCHEMES
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