Table 63. Spi Characteristics - STMicroelectronics STM32F042G4 Manual

Electrical characteristics
2
SPI/I S characteristics
Unless otherwise specified, the parameters given in
are derived from tests performed under the ambient temperature, f
supply voltage conditions summarized in
Refer to Section 6.3.14: I/O port characteristics
function characteristics (NSS, SCK, MOSI, MISO for SPI and WS, CK, SD for I
Symbol Parameter
f
SCK
SPI clock frequency
1/t
c(SCK)
t SPI clock rise and fall
r(SCK)
t time
f(SCK)
t NSS setup time
su(NSS)
t NSS hold time
h(NSS)
t
w(SCKH)
SCK high and low time
t
w(SCKL)
t
su(MI)
Data input setup time
t
su(SI)
t
h(MI)
Data input hold time
t
h(SI)
(2)
t Data output access time
a(SO)
(3)
t Data output disable time
dis(SO)
t Data output valid time
v(SO)
t Data output valid time
v(MO)
t
h(SO)
Data output hold time
t
h(MO)
SPI slave input clock
DuCy(SCK)
duty cycle
1. Data based on characterization results, not tested in production.
2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data.
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z
90/117
Table 21: General operating

Table 63. SPI characteristics

Conditions
Master mode
Slave mode
Capacitive load: C = 15 pF
Slave mode
Slave mode
Master mode, f = 36 MHz,
PCLK
presc = 4
Master mode
Slave mode
Master mode
Slave mode
Slave mode, f = 20 MHz
PCLK
Slave mode
Slave mode (after enable edge)
Master mode (after enable edge)
Slave mode (after enable edge)
Master mode (after enable edge)
Slave mode
DocID025832 Rev 2
Table 63 for SPI or in
PCLKx
for more details on the input/output alternate
(1)
Min
-
-
-
4Tpclk
2Tpclk + 10
Tpclk/2 -2
4
5
4
5
0
0
-
-
11.5
2
25
STM32F042xx
2
Table 64 for I S
frequency and
conditions.
2
S).
Max Unit
18
MHz
18
6 ns
-
-
Tpclk/2 + 1
-
-
-
ns
-
3Tpclk
18
22.5
6
-
-
75 %