Universal Synchronous/Asynchronous Receiver Transmitters (Usart); Table 9. Stm32F042X I 2 C Implementation; Table 10. Stm32F042X Usart Implementation - STMicroelectronics STM32F042G4 Manual

STM32F042xx
from the CPU clock, allowing the I2C1 to wake up the MCU from Stop mode on address
match.
The I2C interface can be served by the DMA controller.
7-bit addressing mode
10-bit addressing mode
Standard mode (up to 100 kbit/s)
Fast mode (up to 400 kbit/s)
Fast Mode Plus with 20mA output drive I/Os (up to 1 Mbit/s)
Independent clock
SMBus
Wakeup from STOP
1. X = supported.
3.15 Universal synchronous/asynchronous receiver transmitters
(USART)
The device embeds up to two universal synchronous/asynchronous receiver transmitters
(USART1 and USART2), which communicate at speeds of up to 6 Mbit/s.
They provide hardware management of the CTS, RTS and RS485 DE signals,
multiprocessor communication mode, master synchronous communication and single-wire
half-duplex communication mode. USART1 supports also SmartCard communication (ISO
7816), IrDA SIR ENDEC, LIN Master/Slave capability and auto baud rate feature, and has a
clock domain independent from the CPU clock, allowing USART1 to wake up the MCU from
Stop mode.
The USART interfaces can be served by the DMA controller.
Refer to
Hardware flow control for modem
Continuous communication using DMA
Multiprocessor communication
Synchronous mode
Smartcard mode
Single-wire half-duplex communication
IrDA SIR ENDEC block
Table 9. STM32F042x I
Table 10 for the differences between USART1 and USART2.

Table 10. STM32F042x USART implementation

USART modes/features
2
C implementation
(1)
I2C features
(1)
DocID025832 Rev 2
Functional overview
USART1 USART2
X
X
X
X
(2)
X
X
X
I2C1
X
X
X
X
X
X
X
X
X
X
X
X
X
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