12-Bit Adc Characteristics; Table 54. Adc Characteristics; Figure 25. Recommended Nrst Pin Protection - STMicroelectronics STM32F042G4 Manual

STM32F042xx
Symbol Parameter
NRST Schmitt trigger voltage
V
hys(NRST)
hysteresis
Weak pull-up equivalent
R
PU (2)
resistor
V NRST input filtered pulse
F(NRST)
V NRST input not filtered pulse
NF(NRST)
1. Data based on design simulation only. Not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance is minimal (~10% order).
3. Data based on design simulation only. Not tested in production.
1. The external capacitor protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the V
Table 53: NRST pin
6.3.16

12-bit ADC characteristics

Unless otherwise specified, the parameters given in
from tests performed under ambient temperature, f
conditions summarized in
Note: It is recommended to perform a calibration after each power-up.
Symbol Parameter
Analog supply voltage for
V
DDA
ADC ON
Current consumption of
I
(1)
DDA (ADC)
the ADC
f ADC clock frequency
ADC
(2)
f Sampling rate
S
Table 53. NRST pin characteristics (continued)
Conditions
V  V
IN
2.7 < V
DD
2.0 < V
DD

Figure 25. Recommended NRST pin protection

characteristics. Otherwise the reset will not be taken into account by the device.
Table 21: General operating

Table 54. ADC characteristics

Conditions
V = V
DD
DocID025832 Rev 2
Min
-
25
SS
-
(3)
< 3.6 300
(3)
< 3.6 500
Table 54
frequency and V
PCLK
conditions.
Min
2.4
= 3.3 V -
DDA
0.6
0.05
Electrical characteristics
Typ Max
200 -
40 55
(1)
- 100
- -
- -
max level specified in
IL(NRST)
are preliminary values derived
supply voltage
DDA
Typ Max
- 3.6
0.9 -
- 14
- 1
Unit
mV
k
ns
ns
Unit
V
mA
MHz
MHz
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