Figure 2.20 Block Diagram Of The 8Dli Board - Samsung OFFICESERV 7100 Service Manual

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2.5.10.1 Block Diagram
The block diagram of the 8DLI board is shown in the figure below:
Address
&
Control
MBD Interface
2.5.10.2 Main Features
The Main Features of the 8DLI board are as follows:
QDMC (STI9511)
The QDMC(STI9511) is a special ASIC for controlling TP3404, which is the Quad Digital
Adapter for Subscriber Loops(QDASL) chip of National Semiconductor. The TP3404
controlled by this chip is an expanded form of the existing TP3401/3402/3403. This chip is
made in the following procedures: The transceiver in a single channel Time Compression
Multiplexed(TCM) transmission method is expanded to 4 ports and micro wired control
and other control structures are changed.
The functional features of the QDMC are as follows:
Transfers/receives data in a UART format for D channels.
A UART speed(2/4/8/16 kbps) can be selected.
The B channel functions as a by-pass interface.
Inter-works with micro wired serial control(16-bit).
2-34
DATA
QDMC
(STI9511)

Figure 2.20 Block Diagram of the 8DLI Board

QDASL
(TP3404)
QDASL
(TP3404)
© SAMSUNG Electronics Co., Ltd.
Line #1
Interface
Line #2
Interface
Line #3
Interface
Line #4
Interface
Line #5
Interface
Line #6
Interface
Line #7
Interface
Line #8
Interface