Service Request Enable Register - Omega Engineering OMB-CHARTSCAN 1400 User Manual

Registers, Data Formats, & Queries
Bit Location Description
Alarm
DI01
DI02 Trigger
Detected
Ready
DI03
DI04 Scan
Available
Message
DI05
Available
(MAV)
Event Status
DI06
Register Bit
(ESB)
Service
DI07
Request Bit
(SRQ)
Buffer
DI08
Overrun

Service Request Enable Register

The service request enable register controls which bits of the status byte register are to be reflected in the
Request for Service and Master Summary Status bits of the status byte register. As shown in the figure on page
C-14, the bits of the status byte register are logically ANDed with the corresponding bits of the service request
enable register. The resulting bits are logically ORed together to form the master summary event status bit
(MSS) in the status byte register and to control the request for service (RQS) bit in that register. The service
request enable register does not affect the status byte register; it only affects the MSS and RQS bits of the status
byte register. The event status enable register is set and interrogated with the Mn command.
IEEE 488 Serial Poll Response
The Serial Poll Status Byte is sent when a serial poll (SPoll) command is received over the IEEE488 bus from
the active controller. Although these bits are always set to indicate ChartScan's status, they do not generate an
SRQ on the IEEE488 bus unless the corresponding enable bit in the Service Request Enable (SRE) register has
been set with the Mn command. Below is a description of each bit in the Serial Poll Status Byte Register.
Bit Location
DIO1 (LSBit)
DIO2
DIO3
DIO4
DIO5
DIO6
DIO7
DIO8 (MSBit)
All bits in the serial poll status byte register are cleared by either a *R command, which returns the ChartScan to
its power-up default conditions, or a read of the serial poll status byte register via the Status command U1.
C-16
Set, Clear and Descriptive Information
Set when the scanning device has sensed a valid alarm condition. The alarm is
cleared when the alarm condition no longer exists.
Set when ChartScan has detected the trigger condition and will be cleared when the
acquisition is complete or the trigger has been reconfigured.
Set when ChartScan is ready to process another command. It is cleared when the
unit is processing a command line. This bit should be examined with a serial poll
prior to issuing a new command line. This allows any detected errors to be traced
to the specific command line containing the error. If all the setup information for a
specific ChartScan operation is included in one line, this bit also indicates when all
processing is done and the X command is completed. This ensures the unit has
completely processed all state changes before initiating any further activity.
Set when at least 1 acquisition scan is available in the acquisition buffer to be read.
Cleared when there are no scans available in the buffer to be read.
Set when the output queue is not empty. It is cleared when the output queue is
empty. This bit reflects whether any command responses are still in the output
queue.
Reflects the logical OR of all the bits in the Event Status Register (ESR) ANDed
with their equivalent enable bits in the Event Status Enable (ESE) register. If this bit
is set, at least one bit in the ESR is set and has its corresponding enable bit in the
ESE set. The status command U0 can be issued to read the ESR. See the
following for more information on ESR and ESE.
Set when ChartScan requests service. It is cleared when a SPOLL is performed.
Set if a buffer overrun occurs. It is cleared when the buffer becomes empty by
either reading out the contents of the buffer or performing a Reset (*B) of the buffer.
Value Description
1 Alarm
2 Trigger Detected
4 Ready
8 Scan Available
16 Message Available(MAV)
32 Event Status Register Bit (ESB)
64 Service Request Bit (SRQ)
128 Buffer Overrun
Bit
1
2
3
4
5
6
7
8
ChartScan User's Manual
Appendix C