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Falcon ECC Memory Controller Chip Set
External Register Set
Address
Bit
3
Name
Operation
Reset
3Falcon ECC Memory Controller Chip Set
0Programming Model
3-52
EXTERNAL REGISTER SET
The EXTERNAL REGISTER SET is user-provided and
is external to the Falcon pair. The Falcon pair provides a
static RAM style interface for the external registers. The
external registers can be SRAM, ROM, Flash or some
other user device. There can be one device connected to
either the upper or lower Falcon, or there can be two
devices with one connected to each Falcon. The devices
can be 8, 16, or 32 bits wide. The data path to the external
devices is via the RD32-RD63 pins. Reads to the external
devices can be any size except burst. Note that if the
devices are less than 32 bits wide, reads to unused data
lanes will yield undefined data. Note that writes are
restricted to one- or four-byte length only. Four-byte
writes can be used for any size device; data should be
placed on the correct portion of the data bus so that valid
data is written to the device. Data duplication is turned off
for the EXTERNAL REGISTER SET so writes can be to
either the upper Falcon, or to the lower Falcon.
Note
For descriptions of how these registers are used in the
MVME2300 series boards, refer to the
Registers
section of Chapter 1, especially to
Cache Control Register (SXCCR)
$FEF88000 - $FEF8FFF8
EXTERNAL REGISTER SET
READ/WRITE
X PL
and
Computer Group Literature Center Web Site
Falcon-Controlled System
System External
CPU Control
Register.
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