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Error Reporting
The Falcon pair checks data from the DRAM during single- and four-beat
reads, during single-beat writes, and during scrubs.
actions taken by the Falcon pair for different errors during these accesses.
Note that the Falcon pair does not assert TEA_ on double-bit errors. In fact,
the Falcon pair does not have a TEA_ signal pin and it assumes that the
system does not implement TEA_. The Falcon can, however, assert
machine check (MCP_) on double-bit errors.
Single-Beat/
Error Type
Four-Beat Read
Terminate the
PowerPC 60x bus cycle
normally.
Provide corrected data to
Single-Bit
the PowerPC 60x bus
Error
master.
Assert INT_ if so
enabled.
Terminate the
PowerPC 60x bus cycle
normally.
Provide miss-corrected,
raw DRAM data to the
Double-Bit
PowerPC 60x bus master.
Error
Assert INT_ if so
enabled.
Assert MCP_ if so
enabled.
Triple- (or
Some of these errors are detected correctly and are treated the same as double-bit errors. The rest could
show up as "no error" or "single-bit error", both of which are incorrect.
greater)
Bit Error
Notes 1. No opportunity for error, since no read of DRAM occurs
http://www.motorola.com/computer/literature
Table 3-7. Error Reporting
Single-Beat Write
Terminate the
PowerPC 60x bus cycle
normally.
Correct the data read
from DRAM, merge with
the write data, and write
the corrected, merged
data to DRAM.
Assert INT_ if so
enabled.
Terminate the
PowerPC 60x bus cycle
normally.
Do not perform the write
portion of the read-
modify-write cycle to
DRAM.
Assert INT_ if so
enabled.
Assert MCP_ if so
enabled.
during a four-beat write.
Functional Description
Table 3-7
Four-Beat Write
This cycle is not seen on
the PowerPC 60x bus.
Write corrected data
back to DRAM if so
1
N/A
enabled.
Assert INT_ if so
enabled.
This cycle is not seen on
the PowerPC 60x bus.
Do not perform the
1
N/A
write portion of the
read-modify-write cycle
to DRAM.
Assert INT_ if so
enabled.
shows the
3
Scrub
3-13
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