DEC 4000 AXP Service Manual page 107

Table 4–2 (Cont.) Error Field Bit Definitions for Error Log Interpretation
Error Field Bits
Quadword 1 Responder Errors
W0-Byte-0, Command/Address Parity Error Detected
<0> C3_0_CA_PAR
<1> C3_1_CA_PAR
<2> MEM0_CA_PAR
<3> MEM1_CA_PAR
<4> MEM2_CA_PAR
<5> MEM3_CA_PAR
<6> IO_CA_PAR
W0-Byte-0, System Bus Interface Write Data Parity Errors
<0> C3_0_WD_PAR
<1> C3_1_WD_PAR
<2> MEM0_WD_PAR
<3> MEM1_WD_PAR
<4> MEM2_WD_PAR
<5> MEM3_WD_PAR
<6> IO_WD_PAR
W1-Byte-0, Memory Uncorrectable Errors
<0> MEM0_UNCORR
<1> MEM1_UNCORR
<2> MEM2_UNCORR
<3> MEM3_UNCORR
U/ERF Bit-to-Text Definition
CPU_0 Bus Command/Add Parity Error
CPU_1 Bus Command/Add Parity Error
MEM_0 Bus Command/Add Parity Error
MEM_1 Bus Command/Add Parity Error
MEM_2 Bus Command/Add Parity Error
MEM_3 Bus Command/Add Parity Error
I/O Bus Command/Add Parity Error
CPU_0 Bus Write Data Parity Error
CPU_1 Bus Write Data Parity Error
MEM_0 Bus Write Data Parity Error
MEM_1 Bus Write Data Parity Error
MEM_2 Bus Write Data Parity Error
MEM_3 Bus Write Data Parity Error
I/O Bus Write Data Parity Error
MEM_0 Uncorrectable Error
MEM_1 Uncorrectable Error
MEM_2 Uncorrectable Error
MEM_3 Uncorrectable Error
Module/Notes
CPU_0, Note 1
CPU_1, Note 1
MEM_0, Note
1
MEM_1, Note
1
MEM_2, Note
1
MEM_3, Note
1
I/O, Note 1
CPU_0, Note 2
CPU_1, Note 2
MEM_0, Note
2
MEM_1, Note
2
MEM_2, Note
2
MEM_3
I/O
MEM_0
MEM_1
MEM_2
MEM_3
(continued on next page)
Error Log Analysis 4–11