DEC 4000 AXP Service Manual page 105

Table 4–2 (Cont.) Error Field Bit Definitions for Error Log Interpretation
Error Field Bits
Quadword 1, CPU1-Detected
W1-Byte-0, CPU Machine Check Related Errors
<0> C3_1_CA_NOACK
<1> C3_1_WD_NOACK
<2> C3_1_RD_PAR
<3> EV_1_C_UNCORR
<4> EV_1_TC_PAR
<5> EV_1_T_PAR
<6> C3_1_EV
W1-Byte-1, CPU Interrupt and Machine Check Related Errors
<0> C3_1_C_UNCORR
<1> C3_1_TC_PAR
<2> C3_1_T_PAR
<3> C3_1_C_CORR
<4> EV_1_C_CORR
Miscellaneous Flags
W2-Byte-0, CPU-Specific (in context of CPU that is reporting the error)
<0> EV_SYN_1F
<1> C3_SYN_1F
<2> DT_PAR
<3> EV_HARD_ERROR
U/ERF Bit-to-Text Definition
CPU_1 Bus Command No-Ack
CPU_1 Bus Write Date No-Ack
CPU_1 Bus Read Parity Error
CPU_1 Cache Uncorrectable (CPU
detected)
CPU_1 Cache tag Control Parity Error
CPU_1 Cache tag Parity Error
CPU_1 CPU to system bus interface data
error
CPU_1 Cache Uncorrectable (system bus
interface detected)
CPU_1 Cache tag Control Parity Error
CPU_1 Cache tag Parity Error
CPU_1 Cache Correctable (system bus
interface detected)
CPU_1 Cache Correctable (CPU detected)
CPU reported syndrome 0x1f
System bus interface reported syndrome
0x1f
Duplicate Tag Store Parity Error
CPU cycle aborted with HARD ERROR
Module/Notes
CPU_1, Note 1
CPU_1, Note 2
CPU_1, Note 3
CPU_1, Note 4
CPU_1
CPU_1
CPU_1
CPU_1, Note 4
CPU_1
CPU_1
CPU_1
CPU_1
Note 4
Note 4
This CPU
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Error Log Analysis 4–9