IBM RT Series Hardware Reference Manual page 440

ControUer-Accessible Registers
The controller has a number of accessible registers. The system
programmer may gain access to or control any of the controller
registers through the microprocessor. These registers are used to
control the controller's operations and to transmit and receive
data. The X in the register address determines the the port
selected; 3 is for port 1 and 2 is for port 2.
Specific registers are selected according to the following figure:
I/O Address Register Selected DLAB State
XF8 TX buffer
o
(write)
XF8 RX buffer
o
(read)
XF8 Divisor Latch LSB 1
XF9 Divisor Latch MSB 1
XF9 Interrupt Enable Register 0
XFA Interrupt Identification Register
XFB Line Control Register
XFC Modem Control Register
XFD Line Status Register
XFE Modem Status Register
XFF Reserved
Controller-Accessible Registers
Transmitter Holding Register (Hex XF8):
The transmitter
holding register (THR) contains the character to be sent.
TrusmlUer Holding Register (hex XF8)
Bit 7 6 5 4 3 2 1 0
~>D'~B;tO
>
Data Bit 1
>
Data Bit 2
>
Data Bit 3
>
Data Bit 4
>
Data BitS
>
Data Bit
6
>
Data Bit 7
Transmitter Holding Register
Bit 0 is the least-significant bit and the first bit sent serially.
Receiver Buffer Register (Hex XF8):
The receiver buffer
register (RBR) contains the received character.
6 Serial/Parallel Adapter