IBM RT Series Hardware Reference Manual page 178

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Light Pen Low Register Format
Bit
7
6
5
4
3
2
1
0
I I I I I I
I I
Low Order Memory Address
Counter
Bit O-Bit 7
Light Pen Low-This is is the low-order 8 bits of
the memory address counter at the time the light
pen was triggered.
Vertical Display Enable End Register
This is a write-only register pointed to when the value in the CRT
Controller address register is hex 12. The processor output port
address for this register is hex 3B5 or hex 3D5.
Vertical Display Enable End Register Format
Bit
7
6
5
4
3
2
1
0
I I I I I I
I •
Low Order Vertical Display
Enable End
Bit O-Bit 7
Vertical Display Enable End-These are the
low-order 8 bits of the vertical display enable end
position. This address specifies which scan line
ends the active video area of the screen. Bit 8 is
in the overflow register location hex 07.
Offset Register
This is a write-only register pointed to when the value in the CRT
Controller address register is hex 13. The processor output port
address for this register is hex 3B5 or hex 3D5.
38 IBM Enhanced Graphics Adapter

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