Addressing - IBM RT Series Hardware Reference Manual

TNL SN20-9844 (March 1987) to 75X0235
Addressing
The Extended Monochrome Graphics Display Adapter attaches to the system I/O channel as a
16-bit device. Therefore, the least significant bit (LSB) of the address field is assumed to be 0
and is ignored by the adapter logic. When the adapter accesses (via DMA) system memory, it
always aligns on even byte addresses (LSB is always driven zero).
The adapter is accessed via two separate address ranges. A 12SK-byte range of I/O channel
memory addresses, beginning at X'DSOOOO', implements the bit map and is accessed via I/O
channel memory read/write operations. This area is called 'memory mapped' memory. Ten
control registers are implemented within a 64-byte space called 'I/O mapped memory'. These
locations are accessed via I/O channel read/write operations.
Memory Mapped Memory Addressing
The high order seven bits of the system address select the 12SK -byte region of the I/O channel
memory map assigned to the adapter. This assigned area is X'DSOOOO' to X'D9FFFF'. The
remaining 16 bits directly address words on even byte boundaries (the LSB address bit is always
zero).
Note: The bit naming notation used in the Extended Monochrome Graphics Display Adapter
documentation follows the IBM convention of using bit 0 as the most significant bit. This
convention is used for both data and addresses.
8 Extended Monochrome Graphics Adapter