Table of Contents
Advertisement
Bit 5-Bit 6
Display Enable Skew Control-These two bits
determine the amount of display enable skew.
Display enable skew control is required to
provide sufficient time for the CRT Controller to
access the display buffer to obtain a character
and attribute code, access the character generator
font, and then go through the Horizontal Pel
Panning Register in the Attribute Controller.
Each access requires the display enable signal to
be skewed one character clock unit so that the
video output is in synchronization with the
horizontal and vertical retrace signals. The bit
values and amount of skew are shown in the
following table:
Bits
6 5
o
0
Zero character clock skew
o
lOne character clock skew
1 0
Two character clock skew
1 1
Three character clock skew
Start Horizontal Retrace Pulse Register
This is a write-only register pointed to when the value in the CRT
Controller address register is hex 04. The processor output port
address for this register is hex 3B5 or hex 3D5.
Start Horizontal Retrace Pulse Register Format
Bit
7
6
5
4
3
2
1
0
I I I I I I I I
~
Start Horizontal Retrace Pulse
This register is used to center the screen horizontally, and to
specify the character position at which the Horizontal Retrace
Pulse becomes active.
28 IBM Enhanced Graphics Adapter
Advertisement
Chapters
Table of Contents
