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Map Mask Register Format
Bit
7
6
5
4
3
2
1
0
Bit O-Bit 3
1 Enables Map 0
1 Enables Map 1
1
Enables Map
2
1 Enables Map 3
Not Used
Map Mask-A logical 1 in bits 3 through 0
enables the processor to write to the
corresponding maps 3 through O.
If
this register
is programmed with a value of OFH, the CPU can
perform a 32-bit write operation with only one
memory cycle. This substantially reduces the
overhead on the CPU during display update
cycles in graphics modes. Data scrolling
operations are also enhanced by setting this
register to a value of OFH and writing the display
buffer address with the data stored in the CPU
data latches. This is a read-modify-write
operation. When odd/even modes are selected,
maps 0 and 1 and maps 2 and 3 should have the
same map mask value.
Character Map Select Register
This is a write-only register pointed to when the value in the
address register is hex 03. The output port address for this
register is 3C5.
IBM Enhanced Graphics Adapter 21
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