IBM RT Series Hardware Reference Manual page 193

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Bit 0
Bit 1
Bit 2-Bit 3
Graphics Mode-This bit controls alpha-mode
addressing. A logical 1 selects graphics mode.
When set to graphics mode, the character
generator address latches are disabled.
Chain Odd Maps To Even Maps-When set to 1,
this bit directs the processor address bit 0 to be
replaced by a higher order bit and odd/even
maps to be selected with odd/even values of the
processor AO bit, respectively.
Memory Map-These bits control the mapping of
the regenerative buffer into the processor address
space.
Bits
3 2
o
0
Hex AOOO for 128K bytes.
o
1
Hex AOOO for 64K bytes.
1 0
Hex BOOO for 32K bytes
1 1
Hex B800 for 32K bytes.
If
the display adapter is mapped at address hex AOOO for 128K
bytes, no other adapter can be installed in the system.
Color Don't Care Register
This is a write-only register and is pointed to by the value in the
Graphics 1 and 2 address register. This value must be hex 07
before writing can take place. The processor output port for this
register is hex 3 CF.
IBM Enhanced Graphics Adapter 53

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