IBM RT Series Hardware Reference Manual page 336

TNL SN20-9844 (March 1987) to 75X0235
Mode Register
1/0 DATA FIELD
0
71 8
1 5
I I I I I I I I I I I I 1
I
TI
II " "
Bit 00 HORIZONTAL ACCESS BIT
Bits
01 03
RESERVED
(000)
Bits 04 07 WRITE MASK COUNT
Bits
08
11 LOGIC FUNCTION
Bits 12 15 START BIT DISPLACEMENT
Figure 16. Mode Register (Address X'ODI0')
Note: This register is initialized to X'8090' with a paR or reset adapter command.
This is a write-only hardware register. Its shadow is stored in mode shadow register which is
described in "Mode Shadow Register" on page 20. The mode register is loaded to X'8090' when
powered on or reset. This mode permits the adapter to accept 16-bit horizontal BAMBA
accesses on a 16-bit boundary. The logic function only effects write operations and replaces the
destination data bits with the I/O channel data bits.
With the horizontal access bit in an active state, a horizontal access starting at the X, Y address
represented by the channel address and the start bit displacement (the 'start bit') occurs. The
access is a string of 1 to 16 bits to the right of the 'start bit'. With the horizontal access bit in an
inactive state, the access is a string of 1 to 16 bits down from the 'start bit'. During a write
operation, the write mask count specifies the number of bits as shown in the chart below. The
logical function, also shown below, specifies the action taken between the write data applied on
the I/O channel and the existing data in the bit map.
The write mask count and logic function bits only affect write operations. The horizontal access
and start bit displacement bits affect both read and write operations on the adapter bit map
including the reading and writing of the various control registers. The programmer must be
aware that, to correctly read the X cursor, Y cursor, queue counter, queue pointer, scan line,
and mode shadow registers, the horizontal access bit must be set to 1 and the start bit
displacement bits must all be set to O. To write the appropriate registers, the mode register
should be set to the reset state which is X'8090'.
24 Extended Monochrome Graphics Adapter