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Register Load
1/0 DATA FIELD
o
I
I
I
I
I
I
1
7
1
8
1
I
I
I
I
I
1
15
I
I
L~I
I
I
Figure 24. Register Load Command Word
TNL SN20-9844 (March 1987) to 75X0235
Bits 00-03 REGISTER DECODE
0000
= = = =>
Load Graphic OP Processor Register 0 (RO)
0001
= = = =>
Load Graphic OP Processor Register 1 (R1)
0010
====>
Load Graphic OP Processor Register 2 (R2)
0011
=
=
=
=>
Load Graphic OP Processor Register 3 (R3)
0100
====>
Load Graphic OP Processor Register 4 (R4)
0101
=
=
= =>
Load Graphic OP Processor Register 5 (R5)
0110
= = = =>
Load Graphic OP Processor Register 6 (R6)
0111
= = = =>
Load Graphic OP Processor Register 7 (R7)
1000
= = = =>
Load Graphic OP Processor Register 8 (R8)
1001
====>
Load Graphic OP Processor Register 9 (R9)
1010
= = = =>
Load Graphic OP Processor Register A (RA)
1011
====>
Load Graphic OP Processor Register B (RB)
Bit 04,05 reserved (set to 0)
Bits 06-15 PARAMETER
Bits 0-3 specify 1 of 12 graphic operation registers. Different graphic operations require different
registers to be loaded.
Extended Monochrome Graphics Adapter
35
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