Bios Generated Ipmi Events; Table 87. Event Data Field Contents For Frb-2 Errors; Table 88. Bios Generated Ipmi Events - Intel SE7520AF2 Technical Product Specification

Intel® Server Board SE7520AF2 TPS
Sensor number Number of sensor that generated this event
Type code 0x6F if event offsets are specific to the sensor
Event Data 1 7:6 00 = unspecified byte 2;
code in byte 2.
5:4 00 = unspecified byte 3;
code in byte 3.
encodings 01
by this
3:0 Offset from Event Trigger for
discrete event state.
Event Data 2 7:0 OEM code 2 or unspecified.
Event Data 3 7:0 OEM code 3 or unspecified.
7.2.2.10 Examples of Event Data Field Contents for FRB-2 Errors
FRB-2 error, failing POST code information not available
FRB-2 error, BIOS uses one byte POST codes. The last POST code before
FRB-2 reset was 0x60.
FRB-2 error, BIOS uses one byte POST codes. The last POST code before
FRB-2 reset was 0x1942.
7.2.3

BIOS Generated IPMI Events

The below table details the events that are initiated by the BIOS and the values that these
events should use to generate SEL entries.
Sensor Generator
Type ID
Processor 31h
Memory 33h
Revision 1.2
(BIOS will not use
and 11 for errors covered
document.)

Table 87. Event Data Field Contents for FRB-2 Errors

Error type

Table 88. BIOS Generated IPMI Events

EMV Sensor Sensor
Rev Type number
Code
04h 07h 90h
04h 0Ch 08h
Intel order number C77866-003
Unique value for each type of event because IPMI
specification requires that. This field has no other
significance, and it should not be displayed to the end
user if the event is logged by BIOS.
0x6F
10 = OEM If Event data 2 and event data 3 contain OEM codes, bits
7:6 and bits 5:4 contain 10. For platforms that do not
include the POST code information with FRB-2 log, both
10 = OEM
these fields will be 0. BIOS either should specify both
bytes or should mark both bytes as unspecified.
According to IPMI 1.0 specification, table 30.3, Byte 3:0
is 03 for FRB-2 failure during POST.
For format rev 0, if this byte is specified, it contains bits
7:0 of the POST code at the time FRB-2 reset occurred
(port 80 code)
For format rev 0, if this byte is specified, it contains bits
15:8 of the POST code at the time FRB-2 reset occurred
(port 81 code). If the BIOS only uses one byte POST
codes, this byte will always be zero.
Event Data 1
0x03
0xA3
0xA3
Type Sensor-
code Specific
Offset
6Fh 03h
6Fh 00h
Error Reporting and Handling
Event Data 2
0xFF
0x60
0x42
Event Event
Data1 Data 2,3
A3h Data2 FRB2/POST
:port80 Failure
Data3
:port81
A0h Data2: Correctable
DIMM ECC
location
Data3:
Event Data 3
0xFF
0x0
0x19
Event
197