Pci Apis; Split Option Rom; Dual Video; Pci Hot Plug Initialization - Intel SE7520AF2 Technical Product Specification

Intel® Server Board SE7520AF2 TPS
5.5.5

PCI APIs

The system BIOS supports the INT 1Ah, AH = B1h functions as defined in the PCI BIOS
Specification. The system BIOS supports the real mode interfaces and does not support the
protected mode interfaces.
5.5.6

Split Option ROM

The BIOS supports the split option ROM algorithm according to the PCI Local Bus Specification
3.0. Refer to the PCI Local Bus Specification 3.0 for further information.
5.5.7

Dual Video

The BIOS supports single and dual video modes. The BIOS enables dual video mode by
default.
− In single mode (Dual Monitor Video = disabled), the onboard video controller is disabled
when an add-in video card is detected.
− In dual mode (Onboard Video = enabled, Dual Monitor Video = enabled), the onboard
video controller is enabled and is the primary video device. The external video card is
allocated resources and is considered the secondary video device.
5.5.8

PCI Hot Plug Initialization

The following describes the PCI hot plug initialization performed by the BIOS on the
SE7520HPAF2 board SKU.
5.5.8.1 PCI Hot-Plug Controller Initialization in Pre-Boot Phase
The hot plug controllers (HPC) come up in an un-initialized state after a power-off or reset. As a
result, the hot plug slots come up in an un-powered state. The BIOS initializes the hot plug
controllers during the boot process. Hot plug controller initialization involves applying power to
the hot plug slots, detecting any error conditions and setting up the speed of the hot plug PCI
bus.
The BIOS only initializes root HPCs. A root HPC is an HPC that is reset only when the entire
system is reset. Such HPCs can depend upon the BIOS to initialize them.
The PXH functions D0:F0 and D0:F2 implement the PCI Standard Hot Plug Controller Revision
1.0 and includes the PCI-X 2.0 addendum for each PCI Segment. The PXH Hot-plug controller
is compatible with the PCI Hot-plug specification, allowing PCI card removal, replacement and
addition without powering down the system.
5.5.8.2 PCI Hot-Plug Resource Padding in Pre-Boot Phase
The BIOS over-allocates resources to PCI slots during boot process. This is known as resource
padding. The over-allocation is done at the PCI-PCI bridge level. Over-allocation of resources
allows a limited number of add-in cards to be hot plugged into a PCI bus without disturbing the
allocation to the rest of the buses. The BIOS reserves the following set of resources for
unpopulated slots:
One bus number
Revision 1.2
Intel order number C77866-003
System BIOS
113