Specifications - Omron CQM1H - PROGRAM Programming Manual

Pulse I/O Board
Pulse Input Indicators
2-2-6

Specifications

High-speed Counter Specifications
Instructions
Instruction
(@)CTBL(63)
(@)INI(61)
(@)PRV(62)
(@)INT(89)
Relevant Flags and
Control Bits for Pulse
Inputs
Word Bits
IR 232 00 to 15
IR 233 00 to 15
IR 234 00 to 15
IR 235 00 to 15
90
Port 1 Port 2
A1 A2
B1 B2
Z1 Z2
Control
Range comparison table registration + com-
parison start
Target value table registration + comparison
start
Range comparison table registration
Target value table registration
Comparison start
Comparison stop
PV change
PV read
Status read
Range comparison result read
Masking all interrupts
Clearing interrupt masks
Bits for Slot 2 of Inner Board when Using Pulse I/O Board
Name
Port 1 PV word (rightmost four
digits)
PV word (leftmost four
digits)
Port 2 PV word (rightmost four
digits)
PV word (leftmost four
digits)
SR Area Bits
Word Bit
SR 252 01
02
Lit when the phase-A pulse input is ON at the port.
Lit when the phase-B pulse input is ON at the port.
Lit when the phase-Z pulse input is ON at the port.
Registers range comparison table and starts
comparison.
Registers target value table and starts com-
parison.
Registers range comparison table.
Registers target value table.
Starts comparison using registered compari-
son table.
Stops comparison.
Changes PV of high-speed counter.
Reads PV of high-speed counter.
Reads status of high-speed counter.
Reads range comparison result.
asking all interrupts, such as input interrupts,
interval timer interrupts, and high-speed
counter interrupts.
Clears masks from interrupts.
The PV of the high-speed counter for each port of
the Pulse I/O Board is stored as an 8-digit BCD
value after each cycle.
Name
High-speed Counter 1
Reset Bit (port 1)
High-speed Counter 2
Reset Bit (port 2)
Section 2-2
Function
Meaning
Function
Function
Phase Z and software reset
0: Counter not reset on phase Z
1: Counter reset on phase Z
Software reset only
0: Counter not reset
0→1: Counter reset