Masking All Interrupts - Omron CQM1H - PROGRAM Programming Manual

Programmable controllers; inner boards
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Interrupt Functions
00000
Subroutine 000
00001
Subroutine 001
00100
Note
1-4-4

Masking All Interrupts

Masking Interrupts
30
When the program is executed, operation will be as shown in the following
diagram.
10 counts
10 counts
(see note 1)
1. The counter will continue operating even while the interrupt routine is being
executed.
2. The input interrupt will remain masked.
The INT(89) instruction can be used to mask and unmask all interrupts as a
group, including input interrupts, interval timer interrupts, and high-speed
counter interrupts. The mask is in addition to any masks on the individual
types of interrupts. Furthermore, clearing the masks for all interrupts does not
clear the masks on the individual types of interrupts, but restores them to the
masked conditions that existed before INT(89) was executed to mask them as
a group.
Interrupts masked/unmasked by INT(89)
Input interrupts
Interval timer interrupts
High-speed counter 0 interrupt
High-speed counter 1 and 2 interrupts
High-speed counter 1 and 2 interrupts
Do not use INT(89) to mask interrupts unless it is necessary to temporarily
mask all interrupts and always use INT(89) instructions in pairs to do so, using
the first INT(89) instruction to mask and the second one to unmask interrupts.
INT(89) cannot be used to mask and unmask all interrupts from within inter-
rupt routines.
Use the INT(89) instruction to disable all interrupts.
If an interrupt is generated while interrupts are masked, interrupt processing
will not be executed but the interrupt will be recorded for the input, interval
timer, and high-speed counter interrupts. The interrupts will then be serviced
as soon as interrupts are unmasked.
20 counts
(see note 1)
Source Unit or Board
CPU Unit
Pulse I/O Board
Absolute Encoder Interface Board
(@)INT(89)
100
000
000
Section 1-4
(see note 2)

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