System Clock Control - Oki ML63611 User Manual

5.5

System Clock Control

The system clock is the basic operation clock of the CPU.
The clock can be selected as follows with the CPUCLK (bit 0 of FCON) setting.
•
CPUCLK = "0" (initial value)
The output of the low-speed clock generator circuit (TBCCLK) is the system clock.
•
CPUCLK = "1"
The output of the high-speed clock generator circuit (HSCLK) is the system clock.
When HSCLK is selected as the system clock, the high-speed clock must be in the oscillating state (ENOSC =
"1"). The low-speed clock generator circuit will continue to oscillate even when the high-speed generator circuit is
selected.
To reduce the total power consumption in applications that use the high-speed clock generator circuit, the
following clock controls are generally implemented in software.
•
During normal operation, the output of the low-speed clock generator circuit (CPUCLK = "0") should
be the system clock.
•
Only when high-speed operation is necessary should the high-speed clock oscillate (ENOSC = "1") and
output of the high-speed clock generator circuit (CPUCLK = "1") should be selected.
For details of the system clock select timing, refer to section 5.7, "System Clock Select Timing".
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
Chapter 5 Clock Generator Circuit (OSC)
5 – 5
OPTION B (D): 1.5 V (3.0 V), With regulator
ML63611 User's Manual
circuit for LCD bias