Interrupt Sequence; Interrupt Processing - Oki ML63611 User Manual

4.3

Interrupt Sequence

4.3.1 Interrupt Processing

While MIE is "1", operation transfers to interrupt processing when individual interrupt factors are generated.
The watchdog timer interrupt is non-maskable and regardless of the MIE flag status, operation will shift to
interrupt processing when the watchdog timer interrupt factor is generated.
The following processes are performed when an interrupt is generated.
(1) MIE and the corresponding interrupt request flag are cleared to "0".
(2) The program counter (PC) is saved on the call stack.
(3) The call stack pointer (SP) is incremented by 1. (SP←SP+1)
(4) The starting address of the interrupt routine is loaded into the program counter (PC).
Interrupt processing is performed in 0 machine cycles.
Figure 4-2 shows the stack contents after an interrupt is generated.
SP position before interrupt
SP position after interrupt
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
Figure 4-2 Call Stack Contents after Interrupt Generation
13 12 11 10 9 8 7 6 5 4 3 2 1 0
PC13–
PC11–PC8 PC7–PC4
PC12
4 – 11
OPTION B (D): 1.5 V (3.0 V), With regulator
ML63611 User's Manual
Chapter 4 Interrupt (INT)
0H
PC3–PC0
1H
2H
3H
4H
0FH
circuit for LCD bias