100 Hz Timer Counter Registers - Oki ML63611 User Manual

ML63611 User's Manual
Chapter 8 100 Hz Timer Counter (100HzTC)
8.3

100 Hz Timer Counter Registers

(1) 100 Hz timer counter control register (T100CON)
This is a 4-bit special function register (SFR) controlling the 100 Hz timer counter.
T100CON (066H)
Count start/stop select
0 : Count stop (initial value)
1 : Count start
bit 0: ECNT
This bit controls count start/stop for the 100 Hz timer counter internal counter. Count starts when
set to "1". At system reset the value is reset to "0" and counting is stopped.
(2) 100 Hz counter register (T100CR)
This is a 4-bit special function register (SFR) to read the 100 Hz counter of the 100 Hz timer counter. The
content of the T100CR is latched by a 4-bit latch in T10CR read operation, so the value of the T100CR must
always be read after reading T10CR.
When data is written in T100CR, both T100CR and T10CR are reset to "0".
T100CR (064H)
(R/W)
(3) 10 Hz counter register (T10CR)
A 4-bit special function register (SFR) to read the 10 Hz counter in the 100 Hz timer counter.
When data is written in T10CR, both T100CR and T10CR are reset to "0".
T10CR (065H)
(R/W)
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
bit 3

(R/W)
bit 3
100C3
bit 3
10C3
bit 2 bit 1
 
bit 2 bit 1
100C2 100C1
bit 2 bit 1
10C2 10C1
8 – 2
OPTION B (D): 1.5 V (3.0 V), With regulator
bit 0
ECNT
bit 0
100C0
bit 0
10C0
circuit for LCD bias