Table of Contents
Advertisement
15.3
Power Supply Circuit Configuration
15.3.1 OPTION A Power Supply Circuit Configuration
The power supply section of the OPTION A consists of the voltage regulator circuit (V/R1) for internal logic
power supply and the voltage regulator circuit (V/R2) for the low-speed clock generator circuit.
The OPTION A does not have the voltage regulator circuit (V/R3) for the LCD bias generation reference voltage.
Since the power supply voltage is used as the LCD bias generation reference voltage, V
V
.
DD
The OPTION A power supply circuit configuration is shown in Figure 15-1.
1.15 V
ENOSC (bit 1 of FCON) = "1"
Figure 15-1 OPTION A Power Supply Circuit Configuration
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
Fixed in the hardware
V
V/R2
XT
0.7 V
V/R1
ENOSC (bit 1 of FCON) = "0"
V
CH
Internal logic circuits (ROM, RAM, CPU, etc.)
Chapter 15 Power Supply Circuit (POWER)
V
HF
Halver circuit
1/2V
DD
LCD bias circuit
Low-speed clock
generator circuit
High-speed clock generator circuit
ML63611
15 – 3
ML63611 User's Manual
has to be shorted to
DD1
V
1.5 V
DD
1.3 to 1.7 V
C
0.1 µF
V
V
HF
Open
HC2
Open
HC1
Open
V
1.0 µF
C
DD3
3
1.0 µF
V
C
DD2
2
V
DD1
C2
1.0 µF
C
C1
12
XT0
5 to 25 pF
XT1
32.768 kHz
0.1 µF
V
C
XT
XT
0.1 µF
V
C
CH
CH
30 pF
C
OSC0
C
OSC1
V
Ceramic resonator
SS
OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
C
G
L0
L1
Advertisement
Table of Contents
