Lcd Driver Registers - Oki ML63611 User Manual

13.3

LCD Driver Registers

(1) Display control register 0 (DSPCON0)
DSPCON0 is a 4-bit special function register (SFR) controlling LCD driver operation.
LCD bias select
0 : 1/3 bias (initial value)
1 : 1/2 bias
LCD power down mode
0 : Normal operation mode (initial value)
1 : Power down mode
All-ON mode
0 : Normal operation mode (initial value)
1 : All-ON mode
LCD display select
0 : All OFF (initial value)
1 : Normal operation mode
bit 3: BISEL
This bit selects 1/3 or 1/2 bias.
At system reset it is "0", selecting 1/3 bias.
bit 2: PDWN
This bit selects the LCD power down mode. When PDWN is set to "1", the bias generation circuit
stops its voltage lowering/raising operation and pins L0 to L63 are all set to the V
reducing supply current. At system reset it is cleared to "0".
bit 1: ALLON
When ALLON is set to "1" all segment drivers are turned on. The ALLON bit has priority over
the LCDON bit. At system reset it is cleared to "0".
bit 0: LCDON
When the LCDON bit is set to "1", the display data in the display register is output to the segment
drivers. At system reset it is cleared to "0", and all segment drivers are turned off.
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
DSPCON0 (090H)
(R/W)
bit 3 bit 2
BISEL PDWN
13 – 7
OPTION B (D): 1.5 V (3.0 V), With regulator
ML63611 User's Manual
Chapter 13 LCD Driver (LCD)
bit 1 bit 0
ALLON
LCDON
circuit for LCD bias
level,
SS