A/D Converter Configuration - Oki ML63611 User Manual

ML63611 User's Manual
Chapter 16 A/D Converter (ADC)
16.2

A/D Converter Configuration

Figure 16-1 shows the A/D converter configuration.
System clock (CLK)
(32.768 kHz
/700 kHz)
RC oscillator section
V
SS
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
<CNTB> 14-stage binary counter
B0 B1
OSCCLK
1/2
a0-3 a4-7
4 4
<CNTA> 4.8-digit decade counter
A0 A1 A2
4
1/(10
a0-3 a4-7 a8-11
4 4
Synchro-
nization
CLK
1
8
2
3 4
IN0 CS0 CRT0 RT0 RS0
RT CT0
0-1
CS0
RI0
RT0
<CROSC0>
Figure 16-1 Layout of A/D Converter
B2 B3
14 Differ-
entiation
a8-11 a12-13
4 2
CLK
A3 A4
Differ-
× 8)
entiation
a12-15 a16-18
4 4 3 CLK
EADC
1
RESETS
0
2
4
OM
0 to 3
1
5 6
V
SS
IN1 CS1 RT1 RS1
RT1
CS1
RS0 RI1
<CROSC1>
16 – 2
OPTION B (D): 1.5 V (3.0 V), With regulator
OVFB
Interrupt request
ADINT
OVFA
SADI R
RESETS
EADC R
<ADCON0>
STV
Internal data bus 8
OSCCLK
V
DD
V
DD
MON
7 8
CROSC
monitor
Inside the IC
RS1
circuit for LCD bias
PE.0