Overview; Registers; Accumulator (A); Flag Register - Oki ML63611 User Manual

2. CPU and Memory Spaces
2.1

Overview

The ML63611 is equipped with Oki's original CPU core nX-4/250.
The instruction set of the nX-4/250 core consists of 407 types of instructions.
The memory space consists of a 16-bit wide program memory space and a 4-bit wide data memory space. A stack
for saving the program counter during a subroutine call or interrupt (call stack) and a stack for saving registers
during a PUSH instruction (register stack) are provided separately from the memory space.
The program memory space is used for program data, ROM table data and melody note data.
In the data memory space, special function registers (SFRs) are located in BANK 0, the LCD display register
(DSPR) in BANK 1, and data RAM in BANKS 2 to 5.
2.2

Registers

The nX-4/250 core processes data mainly with the accumulator and register set.
The register set is a programming model consisting of the HL and XY registers that store data memory addresses,
the current bank register (CBR), the extra bank register (EBR), the RA register that stores program memory
addresses, registers that control program flow, and registers that control flags and memory.

2.2.1 Accumulator (A)

The accumulator (A) is the central register for various arithmetic operations.
At system reset, the accumulator is initialized to "0". When an interrupt occurs, a "PUSH HL" instruction can be
used if necessary to save the accumulator on the register stack. The accumulator can be restored with a "POP HL"
instruction.

2.2.2 Flag Register

The flag register consists of 3 flags: the carry flag (C), the zero flag (Z) and the G flag (G). When an interrupt
occurs, a "PUSH HL" instruction can be used if necessary to save the flag register on the register stack. The flag
register can be restored with a "POP HL" instruction.
2.2.2.1

Carry Flag (C)

The carry flag (C) is a 1-bit flag that is loaded with a carry during addition or a borrow during subtraction. At
system reset, the carry flag is initialized to "0".
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
Chapter 2 CPU and Memory Spaces
3 2 1 0
A
Accumulator
G C Z
Flag register
2 – 1
OPTION B (D): 1.5 V (3.0 V), With regulator
ML63611 User's Manual
circuit for LCD bias