Lcd Driver Operation - Oki ML63611 User Manual

ML63611 User's Manual
Chapter 13 LCD Driver (LCD)
13.4

LCD Driver Operation

The LCD driver outputs LCD driving waveforms based on the data written to the segment register.
Use the mask option to specify the assignment of segment register address and bit and to select the segment driver
and common driver.
One segment driver is assigned to four segments of the segment register. For 1/4 duty, all the four segments are
used; for 1/3 duty, three segments are used; and for 1/2 duty, two segments are used.
The display duty is selected from 1/1 to 1/4 using DSPCON1. The frame frequency for each duty ratio is indicated
in Table 13-1. Depending on the duty selected, the common signal (COM1 to COM4) is generated, and data
written in synchronization with that common signal to the segment register is output to the segment driver. The
segment driver uses bit 0 (ALLON) and bit 1 (LCDON) of the display control register 0 (DSPCON0) to control all
OFF and all ON modes.
When PDWN (bit 2 of DSPCON0) is set to "1", the LCD power down mode is enabled. In the LCD power-down
mode the bias generation circuit operation stops, and the L0 to L63 pins are all output at the V
supply current.
BISEL (bit 3 of DSPCON0) selects 1/2 or 1/3 bias. When 1/2 duty is selected, select 1/2 bias with the display
control register 0.
DSPCNT controls the LCD contrast of 16 tones. However, the adjustable range of the contrast varies depending
on the battery voltage.
The contrast adjustment is disabled in the OPTION A and OPTION C.
!
Note:
When the LCD driver is not used, select the power-down mode and set all the bits of the display control register
(DSPCNT) to "0" to save the supply current.
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
Table 13-1 Frame Frequency for Each Duty
DSPCON1
DT1–0 DT1 DT0
0H 0 0
1H 0 1
2H 1 0
3H 1 1
Duty Frame frequency
1/4 64 Hz
1/1 64 Hz
1/2 64 Hz
1/3 85.3 Hz
13 – 10
OPTION B (D): 1.5 V (3.0 V), With regulator
level to reduce
SS
circuit for LCD bias