Simulating The Intel Stratix 10 Mx Hbm2 Ip; Intel Stratix 10 Mx Hbm2 Ip Example Design - Intel Stratix 10 MX HBM2 IP User Manual

UG-20031 | December 2017

4 Simulating the Intel Stratix 10 MX HBM2 IP

This section describes how to simulate the generated HBM2 IP.
Simulation Assumptions
The parameter settings that you make on the Controller tab affect efficiency during
simulation. In the default configuration, with the default parameter settings, the traffic
generator issues sequential transactions.
Supported Simulators
The HMB2 IP supports the following simulators:
• ModelSim*- Intel FPGA Edition
• ModelSim SE
• Questa* Advanced Simulator
• NCSim*
• Aldec Riviera-PRO*
• Synopsys* VCS

4.1 Intel Stratix 10 MX HBM2 IP Example Design

The following illustration shows a high-level block diagram of the HBM2 example
design that provides the simulation environment for the Intel Stratix 10 MX HBM2 IP
when generated for simulation.
Figure 13. Intel Stratix 10 MX HBM2 IP Generated for Simulation
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