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Thermal Control
The HBM2 controller uses the TEMP and CATTRIP outputs from the HBM2 device to
manage temperature variations in the HBM2 interface.
•
Temperature compensated refresh (TEMP): The HBM2 DRAM provides temperature
compensated refresh information to the controller through the TEMP[2:0] pins,
which defines the proper refresh rate that the DRAM expects to maintain data
integrity. Absolute temperature values for each encoding are vendor-specific. The
encoding on the TEMP[2:0] pins reflects the required refresh rate for the hottest
device in the stack. The TEMP data updates when the temperature exceeds
vendor-specified threshold levels appropriate for each refresh rate.
•
Catastrophic temperature sensor (CATTRIP): The CATTRIP sensor detects whether
the junction temperature of any die in the stack exceeds the catastrophic trip
threshold value CATTEMP. The device vendor programs the CATTEMP to a value
less than the temperature at which permanent damage to the HBM stack would
occur.
If a junction temperature anywhere in the stack exceeds the CATTEMP value, the
HBM stack drives the external CATTRIP pin to
damage may occur. When the CATTRIP pin is at
HBM and stalls indefinitely. To resolve the overheating situation and return the
CATTRIP value to
the device to cool before again applying power.
•
Thermal throttling: Thermal throttling is a controller safety feature that helps
control thermal runaway if the HBM2 die overheats, preventing a catastrophic
failure. You can specify the HBM2 device junction temperature at which the
controller begins to throttle input commands, and the throttle ratio that
determines the throttle frequency. The controller deasserts the AXI ready signals
(
awready
commands and data.
Refresh requests
The HBM2 controller handles HBM2 memory refresh requirements and issues refresh
requests at the optimal time. The controller automatically controls refresh rates based
on the temperature setting of the memory through the TEMP vector that the memory
provides. You can select the HBM2 controller refresh policy, based on the frequency of
refresh requests. You can choose to issue refresh commands directly, through the
sideband APB interface.
Precharge policy
The HBM2 controller issues precharge commands to the HBM2 memory based on the
write/read transaction address. In addition, you can issue an auto-precharge
command together with a write and read command, through the AXI write address
port and AXI read address port.
There are two auto-precharge modes:
•
HINT – You can issue the auto-precharge request. The controller then decides
when to issue the precharge command.
•
FORCED – You provide auto-precharge requests through the AXI interface and the
precharge request executes.
®
®
Intel
Stratix
10 MX HBM2 IP User Guide
12
, remove power from the device and allow sufficient time for
0
,
and
wready
arready
2 Intel Stratix 10 MX HBM2 Architecture
, indicating that catastrophic
1
, the controller stops all traffic to
1
) when it is actively throttling the input
UG-20031 | December 2017
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