Diagnostic Parameters For Intel Stratix 10 Mx Hbm2 Ip - Intel Stratix 10 MX HBM2 IP User Manual

3 Generating the Intel Stratix 10 MX HBM2 IP
UG-20031 | December 2017
Display Name
Power Down Enable
Refresh mode
Refresh policy
Enable 64B access for performance
Width of User Data
Memory channel ECC generation and checking/correction
Write data mask enable

3.4 Diagnostic Parameters for Intel Stratix 10 MX HBM2 IP

The Diagnostics tab allows you to select traffic options and to enable the efficiency
monitor that measures HBM2 controller efficiency during functional simulation.
Description
You can choose between two values for this parameter:
• WRAP_FORCED mode, in which the HBM2 controller
implements a user-requested auto-precharge command.
• WRAP_HINT mode, in which the controller determines
when to issue an auto-precharge command, based on
user-issued auto-precharge input and the address
specified.
Allows the controller to power down when there are no
commands in the queue for a long period of time.
Specifies how the HBM2 controller receives refresh
requests:
• The default value is Controller refresh all, which
allows the controller to decide when to issue refresh
requests.
• Alternatively, you can issue refresh requests through the
APB sideband interface, to all or specific banks.
Specifies how the controller issues refresh commands, when
you set Refresh mode to Controller refresh all.
• The default Flexible setting allows the controller to
determine when to issue refresh requests.
• The Pre-pay setting allows the controller to issue
refresh commands earlier when the controller is idle.
• The Post-pay setting allows the controller to postpone
refresh commands until there are no pending requests,
or when it is time to issue a refresh command. Select
this setting in bandwidth-sensitive applications.
Enable this parameter for 64 bit (burst length 8) data
transfer through the Pseudo Channel between the UIB and
the HBM2 device.
For 32-bit (burst length 4) data transfer, disable this
parameter.
Specifies the data width to use. The default setting is 256
bits for each HBM2 channel.
Optionally, if you are not using the ECC or DM pins, you can
specify the entire 288 bits for data.
The HBM2 controller supports single-bit error correction and
double-bit error detection.
The controller does not support write data mask in ECC
generation mode.
Enables the write data mask (DM) input to the HBM2 DRAM.
When you use the DM pins, you cannot use ECC.
®
Intel Stratix
®
10 MX HBM2 IP User Guide
19