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SHARP SERVICE MANUAL JX8200SM [13] ELECTRICAL SECTION
Negotiation phase:
Set to HIGH.
Reverse data transfer
Set to HIGH.
phase:
ECP Mode:
Driven to LOW to set the channel in the
reverse direction. During this ECP Mode,
the peripheral devices can only drive the
bi-directional data signal when nReverse
Request is LOW and the 1284 Active is
HIGH.
EPP Mode:
This signal is active LOW. It makes the
termination cycle start and returns the in-
terface to Compatibility Mode.
nDataAvail/nPeriphRequest (nFault): Driven by the peripheral
devices.
Compatibility Mode:
Set by the peripheral device to show an
error occurrence. The meaning of this sig-
nal differs depending on the peripheral
device.
Negotiation phase:
Set to HIGH to show the conformity to the
1284 standards. Then it is set to LOW
after setting HostBusy (nAutoFd) to HIGH
in the Nibble Mode or the Byte Mode to
show that the host is ready for data recep-
tion from the peripheral devices.
Reverse data transfer
Nibble Mode: Set to LOW to show that the
phase:
peripheral device has data and is ready to
send to the host. Then it is used to send
data bit 0 and 4.
Byte Mode:
Used to show that there are some data.
Reverse idle phase:
Used to show that there are some data.
ECP Mode:
In the ECP Mode, this pin is driven to
LOW to request for communication with
the host. This request serves as a mere
"hint" for the host, and the final control on
the transfer direction is made by the host.
This signal provides the peer-to-peer com-
munication mechanism.
This signal is valid only in the forward
phase.
It is generally used to interrupt the host.
EPP Mode:
This signal is not used in the EPP Mode.
1284 Active/nAStrb (nSelect In): Driven by the host.
Compatibility Mode:
Set to LOW by the host to select the
peripheral device.
Negotiation phase:
To request the 1284 mode, this signal is
set to HIGH and HostBusy is set to LOW.
Reverse data transfer
Set to HIGH to show that the bus direction
phase:
is from the peripheral to the host.
Set to LOW to set the bus direction from
the host to the peripheral.
Reverse idle phase:
Same as the Reverse data transfer phase.
ECP Mode:
In the ECP Mode, driven to HIGH by the
host. After completion of the ECP Mode
operation, it is set to LOW to return the
link to the Compatibility Mode.
EPP Mode:
This signal is used to show the address
cycle. Active LOW.
Host Logic High: Driven by the host.
Set to HIGH by the host to show that all the other signals sourced by
the host are valid. Set to LOW to show that the host power is off or
the host drive interface signal is invalid.
The host maker may use this signal to supply +5V power to the
connected device, but it is not vitally necessary.
In all cases, the short current of the host must be limited to max.
1.0A. The circuit must be provided to assure the effective logic LOW
level of this signal when the peripheral device power is turned off.
13 – 28
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