Texas Instruments TMS320C6670 Data Manual page 69

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Table 3-2 Device State Control Registers (Part 2 of 4)
Address Start Address End
0x02620150 0x02620153
0x02620154 0x02620157
0x02620158 0x0262015B
0x0262015C 0x0262015F
0x02620160 0x02620160
0x02620164 0x02620167
0x02620168 0x0262016B
0x0262016C 0x0262017F
0x02620180 0x02620183
0x02620184 0x0262018F
0x02620190 0x02620193
0x02620194 0x02620197
0x02620198 0x0262019B
0x0262019C 0x0262019F
0x026201A0 0x026201A3
0x026201A4 0x026201A7
0x026201A8 0x026201AB
0x026201AC 0x026201AF
0x026201B0 0x026201B3
0x026201B4 0x026201B7
0x026201B8 0x026201BB
0x026201BC 0x026201BF
0x026201C0 0x026201C3
0x026201C4 0x026201C7
0x026201C8 0x026201CB
0x026201CC 0x026201CF
0x026201D0 0x026201FF
0x02620200 0x02620203
0x02620204 0x02620207
0x02620208 0x0262020B
0x0262020C 0x0262020F
0x02620210 0x02620213
0x02620214 0x02620217
0x02620218 0x0262021B
0x0262021C 0x0262021F
0x02620220 0x0262023F
0x02620240 0x02620243
0x02620244 0x02620247
0x02620248 0x0262024B
0x0262024C 0x0262024F
0x02620250 0x02620253
0x02620254 0x02620257
0x02620258 0x0262025B
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Multicore Fixed and Floating-Point System-on-Chip
Size Acronym
4B PWRSTATECTL
4B SRIO_SERDES_STS
4B SGMII_SERDES_STS
4B PCIE_SERDES_STS
4B HYPERLINK_SERDES_STS
4B AIF2_A_SERDES_STS
4B AIF2_B_SERDES_STS
20B Reserved
4B SmartReflex Class0
12B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
4B Reserved
48B Reserved
4B NMIGR0
4B NMIGR1
4B NMIGR2
4B NMIGR3
4B Reserved
4B Reserved
4B Reserved
4B Reserved
32B Reserved
4B IPCGR0
4B IPCGR1
4B IPCGR2
4B IPCGR3
4B Reserved
4B Reserved
4B Reserved
Description
See section 3.3.10
See ''Related Documentation from Texas Instruments''
See section 3.3.11
See section 3.3.12
TMS320C6670
SPRS689D—March 2012
on page 66
Device Configuration 69