Texas Instruments TMS320C6670 Data Manual page 175

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Table 7-43 CIC1 Registers (Part 3 of 3)
Address Offset Register Mnemonic
0x804 HINT_MAP_REG1
0x808 HINT_MAP_REG2
0x80c HINT_MAP_REG3
0x810 HINT_MAP_REG4
0x814 HINT_MAP_REG5
0x818 HINT_MAP_REG6
0x81c HINT_MAP_REG7
0x820 HINT_MAP_REG8
0x824 HINT_MAP_REG9
0x828 HINT_MAP_REG10
0x82c HINT_MAP_REG11
0x830 HINT_MAP_REG12
0x834 HINT_MAP_REG13
0x1500 ENABLE_HINT_REG0
0x1504 ENABLE_HINT_REG1
End of Table 7-43
7.9.2.3 CIC2 Register Map
Table 7-44 CIC2 Registers (Part 1 of 2)
Address Offset Register Mnemonic
0x0 REVISION_REG
0x10 GLOBAL_ENABLE_HINT_REG
0x20 STATUS_SET_INDEX_REG
0x24 STATUS_CLR_INDEX_REG
0x28 ENABLE_SET_INDEX_REG
0x2c ENABLE_CLR_INDEX_REG
0x34 HINT_ENABLE_SET_INDEX_REG
0x38 HINT_ENABLE_CLR_INDEX_REG
0x200 RAW_STATUS_REG0
0x204 RAW_STATUS_REG1
0x280 ENA_STATUS_REG0
0x284 ENA_STATUS_REG1
0x300 ENABLE_REG0
0x304 ENABLE_REG1
0x380 ENABLE_CLR_REG0
0x384 ENABLE_CLR_REG1
0x400 CH_MAP_REG0
0x404 CH_MAP_REG1
0x408 CH_MAP_REG2
0x40c CH_MAP_REG3
0x410 CH_MAP_REG4
0x414 CH_MAP_REG5
0x418 CH_MAP_REG6
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Multicore Fixed and Floating-Point System-on-Chip
Register Name
Host Interrupt Map Register for 4 to 4+3
Host Interrupt Map Register for 8 to 8+3
Host Interrupt Map Register for 12 to 12+3
Host Interrupt Map Register for 16 to 16+3
Host Interrupt Map Register for 20 to 20+3
Host Interrupt Map Register for 24 to 24+3
Host Interrupt Map Register for 28 to 28+3
Host Interrupt Map Register for 32 to 32+3
Host Interrupt Map Register for 36 to 36+3
Host Interrupt Map Register for 40 to 40+3
Host Interrupt Map Register for 44 to 44+3
Host Interrupt Map Register for 48 to 48+3
Host Interrupt Map Register for 52 to 52+3
Host Int Enable Register 0
Host Int Enable Register 1
Register Name
Revision Register
Global Host Int Enable Register
Status Set Index Register
Status Clear Index Register
Enable Set Index Register
Enable Clear Index Register
Host Int Enable Set Index Register
Host Int Enable Clear Index Register
Raw Status Register 0
Raw Status Register 1
Enabled Status Register 0
Enabled Status Register 1
Enable Register 0
Enable Register 1
Enable Clear Register 0
Enable Clear Register 1
Interrupt Channel Map Register for 0 to 0+3
Interrupt Channel Map Register for 4 to 4+3
Interrupt Channel Map Register for 8 to 8+3
Interrupt Channel Map Register for 12 to 12+3
Interrupt Channel Map Register for 16 to 16+3
Interrupt Channel Map Register for 20 to 20+3
Interrupt Channel Map Register for 24 to 24+3
TMS320C6670 Peripheral Information and Electrical Specifications
TMS320C6670
SPRS689D—March 2012
175