Texas Instruments TMS320C6670 Data Manual page 161

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Table 7-39 CIC0 Event Inputs — C66x CorePac Secondary Interrupts (Part 2 of 6)
Input Event# on CIC System Interrupt
40 EDMA3CC0 INT2
41 EDMA3CC0 INT3
42 EDMA3CC0 INT4
43 EDMA3CC0 INT5
44 EDMA3CC0 INT6
45 EDMA3CC0 INT7
46 Reserved
47 Reserved
48 PCIEXpress_ERR_INT
49 PCIEXpress_PM_INT
50 PCIEXpress_Legacy_INTA
51 PCIEXpress_Legacy_INTB
52 PCIEXpress_Legacy_INTC
53 PCIEXpress_Legacy_INTD
54 SPIINT0
55 SPIINT1
56 SPIXEVT
57 SPIREVT
58 I2CINT
59 I2CREVT
60 I2CXEVT
61 Reserved
62 Reserved
63 TETBHFULLINT
64 TETBFULLINT
65 TETBACQINT
66 TETBOVFLINT
67 TETBUNFLINT
68 mdio_link_intr0
69 mdio_link_intr1
70 mdio_user_intr0
71 mdio_user_intr1
72 misc_intr
73 Tracer_core_0_INTD
74 Tracer_core_1_INTD
75 Tracer_core_2_INTD
76 Tracer_core_3_INTD
77 Tracer_DDR_INTD
78 Tracer_MSMC_0_INTD
79 Tracer_MSMC_1_INTD
80 Tracer_MSMC_2_INTD
81 Tracer_MSMC_3_INTD
82 Tracer_CFG_INTD
83 Tracer_QM_SS_CFG_INTD
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Multicore Fixed and Floating-Point System-on-Chip
Description
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion interrupt
EDMA3CC0 individual completion Interrupt
EDMA3CC0 individual completion interrupt
Protocol error interrupt
Power management interrupt
Legacy interrupt mode
Legacy interrupt mode
Legacy interrupt mode
Legacy interrupt mode
SPI interrupt0
SPI interrupt1
SPI transmit event
SPI receive event
2
I C interrupt
2
I C receive event
2
I C transmit event
TETB is half full
TETB is full
Acquisition has been completed
Overflow condition occurred
Underflow condition occurred
Packet Accelerator subsystem MDIO interrupt
Packet Accelerator subsystem MDIO interrupt
Packet Accelerator subsystem MDIO interrupt
Packet Accelerator subsystem MDIO interrupt
Packet Accelerator subsystem misc Interrupt
Tracer sliding time window interrupt for individual core
Tracer sliding time window interrupt for individual core
Tracer sliding time window interrupt for individual core
Tracer sliding time window interrupt for individual core
Tracer sliding time window interrupt for DDR3 EMIF1
Tracer sliding time window interrupt for MSMC SRAM bank0
Tracer sliding time window interrupt for MSMC SRAM bank1
Tracer sliding time window interrupt for MSMC SRAM bank2
Tracer sliding time window interrupt for MSMC SRAM bank3
Tracer sliding time window interrupt for CFG0 SCR
Tracer sliding time window interrupt for QM_SS CFG
TMS320C6670 Peripheral Information and Electrical Specifications
TMS320C6670
SPRS689D—March 2012
161