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TMS320C6670
Multicore Fixed and Floating-Point System-on-Chip
SPRS689D—March 2012
Table 2-2
Memory Map Summary (Part 6 of 9)
Logical 32 bit Address
Start
End
027B 0000
027B FFFF
027C 0000
027C FFFF
027D 0000
027D 3FFF
027D 4000
027D FFFF
027E 0000
027E 3FFF
027E 4000
027E FFFF
027F 0000
027F 3FFF
027F 4000
027F FFFF
0280 0000
0280 3FFF
0280 4000
0280 FFFF
0281 0000
0281 3FFF
0281 4000
0281 FFFF
0282 0000
0282 3FFF
0282 4000
0282 FFFF
0283 0000
0283 3FFF
0283 4000
0283 FFFF
0284 0000
0284 3FFF
0284 4000
0284 FFFF
0285 0000
0285 7FFF
0285 8000
0285 FFFF
0286 0000
028F FFFF
0290 0000
0290 0FFF
0290 8000
029F FFFF
02A0 0000
02AF FFFF
02B0 0000
02BF FFFF
02C0 0000
02FF FFFF
03000 000
07FF FFFF
0800 0000
0800 FFFF
0801 0000
0BBF FFFF
0BC0 0000
0BCF FFFF
0BD0 0000
0BFF FFFF
0C00 0000
0C1F FFFF
0C20 0000
0C3F FFFF
0C40 0000
0FFF FFFF
1000 0000
107F FFFF
1080 0000
108F FFFF
1090 0000
10DF FFFF
10E0 0000
10E0 7FFF
10E0 8000
10EF FFFF
10F0 0000
10F0 7FFF
10F0 8000
117F FFFF
1180 0000
118F FFFF
1190 0000
11DF FFFF
26
Device Overview
Physical 36 bit Address
Start
End
0 027B 0000
0 027B FFFF
0 027C 0000
0 027C FFFF
0 027D 0000
0 027D 3FFF
0 027D 4000
0 027D FFFF
0 027E 0000
0 027E 3FFF
0 027E 4000
0 027E FFFF
0 027F 0000
0 027F 3FFF
0 027F 4000
0 027F FFFF
0 0280 0000
0 0280 3FFF
0 0280 4000
0 0280 FFFF
0 0281 0000
0 0281 3FFF
0 0281 4000
0 0281 FFFF
0 0282 0000
0 0282 3FFF
0 0282 4000
0 0282 FFFF
0 0283 0000
0 0283 3FFF
0 0283 4000
0 0283 FFFF
0 0284 0000
0 0284 3FFF
0 0284 4000
0 0284 FFFF
0 0285 0000
0 0285 7FFF
0 0285 8000
0 0285 FFFF
0 0286 0000
0 028F FFFF
0 0290 0000
0 0290 0FFF
0 0290 8000
0 029F FFFF
0 02A0 0000
0 02AF FFFF
0 02B0 0000
0 02BF FFFF
0 02C0 0000
0 02FF FFFF
0 03000 000
0 07FF FFFF
0 0800 0000
0 0800 FFFF
0 0801 0000
0 0BBF FFFF
0 0BC0 0000
0 0BCF FFFF
0 0BD0 0000
0 0BFF FFFF
0 0C00 0000
0 0C1F FFFF
0 0C20 0000
0 0C3F FFFF
0 0C40 0000
0 0FFF FFFF
0 1000 0000
0 107F FFFF
0 1080 0000
0 108F FFFF
0 1090 0000
0 10DF FFFF
0 10E0 0000
0 10E0 7FFF
0 10E0 8000
0 10EF FFFF
0 10F0 0000
0 10F0 7FFF
0 10F0 8000
0 117F FFFF
0 1180 0000
0 118F FFFF
0 1190 0000
0 11DF FFFF
Bytes
Description
64K
Reserved
64K
Reserved
16K
TI embedded trace buffer (TETB) - CorePac0
48K
Reserved
16K
TI embedded trace buffer (TETB) - CorePac1
48K
Reserved
16K
TI embedded trace buffer (TETB) - CorePac2
48K
Reserved
16
TI embedded trace buffer (TETB) - CorePac3
48K
Reserved
16K
Reserved
48K
Reserved
16K
Reserved
48K
Reserved
16K
Reserved
48K
Reserved
16K
Reserved
48K
Reserved
32K
TI embedded trace buffer (TETB) - system
32K
Reserved
640K
Reserved
4K
Serial RapidIO (SRIO) configuration
1M-32K
Reserved
1M
Queue Manager subsystem configuration
1M
Reserved
4M
Reserved
80M
Reserved
64K
Extended Memory Controller (XMC) configuration
60M-64K
Reserved
1M
Multicore Shared Memory Controller (MSMC) config
3M
Reserved
2M
Multicore Shared Memory (MSM)
2M
Reserved
60M
Reserved
8M
Reserved
1M
CorePac0 L2 SRAM
5M
Reserved
32K
CorePac0 L1P SRAM
1M-32K
Reserved
32K
CorePac0 L1D SRAM
9M-32K
Reserved
1M
CorePac1 L2 SRAM
5M
Reserved
Copyright 2012 Texas Instruments Incorporated
www.ti.com
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