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TMS320C6670
Multicore Fixed and Floating-Point System-on-Chip
SPRS689D—March 2012
Table 2-2
Memory Map Summary (Part 8 of 9)
Logical 32 bit Address
Start
End
17F0 8000
1FFF FFFF
2000 0000
200F FFFF
2010 0000
201F FFFF
2020 0000
205F FFFF
2060 0000
206F FFFF
2070 0000
207F FFFF
2080 0000
208F FFFF
2090 0000
2090 1FFF
2090 2000
2090 3FFF
2090 4000
209F FFFF
20A0 0000
20A3 FFFF
20A4 0000
20A4 FFFF
20A5 0000
20AF FFFF
20B0 0000
20B1 FFFF
20B2 0000
20BE FFFF
20BF 0000
20BF 01FF
20BF 0400
20BF FFFF
20C0 0000
20C0 00FF
20C0 0100
20FF FFFF
2100 0000
2100 01FF
2100 0200
213F FFFF
2140 0000
2140 00FF
2140 0400
217F FFFF
2180 0000
2180 7FFF
2180 8000
21BF FFFF
21C0 0000
21FF FFFF
2200 0000
229F FFFF
22A0 0000
22A0 FFFF
22A1 0000
22AF FFFF
22B0 0000
22B0 FFFF
22B1 0000
22BF FFFF
22C0 0000
22C0 FFFF
22C1 0000
22CF FFFF
22D0 0000
22D0 FFFF
22D1 0000
22DF FFFF
22E0 0000
23FF FFFF
2400 0000
2FFF FFFF
3000 0000
331F FFFF
3320 0000
335F FFFF
3360 0000
33FF FFFF
3400 0000
341F FFFF
3420 0000
342F FFFF
3430 0000
3439 FFFF
28
Device Overview
Physical 36 bit Address
Start
End
0 17F0 8000
0 1FFF FFFF
0 2000 0000
0 200F FFFF
0 2010 0000
0 201F FFFF
0 2020 0000
0 205F FFFF
0 2060 0000
0 206F FFFF
0 2070 0000
0 207F FFFF
0 2080 0000
0 208F FFFF
0 2090 0000
0 2090 1FFF
0 2090 2000
0 2090 3FFF
0 2090 4000
0 209F FFFF
0 20A0 0000
0 20A3 FFFF
0 20A4 0000
0 20A4 FFFF
0 20A5 0000
0 20AF FFFF
0 20B0 0000
0 20B1 FFFF
0 20B2 0000
0 20BE FFFF
0 20BF 0000
0 20BF 01FF
0 20BF 0400
0 20BF FFFF
0 20C0 0000
0 20C0 00FF
0 20C0 0100
0 20FF FFFF
1 0000 0000
1 0000 01FF
0 2100 0200
0 213F FFFF
0 2140 0000
0 2140 00FF
0 2140 0400
0 217F FFFF
0 2180 0000
0 2180 7FFF
0 2180 8000
0 21BF FFFF
0 21C0 0000
0 21FF FFFF
0 2200 0000
0 229F FFFF
0 22A0 0000
0 22A0 FFFF
0 22A1 0000
0 22AF FFFF
0 22B0 0000
0 22B0 FFFF
0 22B1 0000
0 22BF FFFF
0 22C0 0000
0 22C0 FFFF
0 22C1 0000
0 22CF FFFF
0 22D0 0000
0 22D0 FFFF
0 22D1 0000
0 22DF FFFF
0 22E0 0000
0 23FF FFFF
0 2400 0000
0 2FFF FFFF
0 3000 0000
0 331F FFFF
0 3320 0000
0 335F FFFF
0 3360 0000
0 33FF FFFF
0 3400 0000
0 341F FFFF
0 3420 0000
0 342F FFFF
0 3430 0000
0 3439 FFFF
Bytes
Description
129M-32K
Reserved
1M
System trace manager (STM) configuration
1M
Reserved
4M
RAC_B data
1M
TCP3d-B data
1M
Reserved
1M
TCP3d-A data
8K
TCP3e data write port
8K
TCP3e data read port
1M-16K
Reserved
256K
Reserved
64K
Reserved
704K
Reserved
128K
Boot ROM
832K
Reserved
512
SPI
63K
Reserved
256
Reserved
4M-256
Reserved
512
DDR3 EMIF configuration
4M-256
Reserved
256
HyperLink config
4M-1K
Reserved
32K
PCIe config
4M-32K
Reserved
4M
Reserved
10M
Reserved
64K
VCP2_A
1M-64K
Reserved
64K
VCP2_B
1M-64K
Reserved
64K
VCP2_C
1M-64K
Reserved
64K
VCP2_D
1M-64K
Reserved
18M
Reserved
192M
Reserved
50M
Reserved
4M
RAC_A data
10M
Reserved
2M
Queue Manager subsystem data
1M
Reserved
640K
Reserved
Copyright 2012 Texas Instruments Incorporated
www.ti.com
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