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Table 2-2
Memory Map Summary (Part 5 of 9)
Logical 32 bit Address
Start
End
0258 0000
025B FFFF
025C 0000
025F FFFF
0260 0000
0260 1FFF
0260 2000
0260 3FFF
0260 4000
0260 5FFF
0260 6000
0260 7FFF
0260 8000
0260 9FFF
0260 A000
0260 BFFF
0260 C000
0260 DFFF
0260 E000
0260 FFFF
0261 0000
0261 FFFF
0262 0000
0262 03FF
0262 0400
0262 FFFF
0263 0000
0263 FFFF
0264 0000
0264 07FF
0264 0800
0264 FFFF
0265 0000
026F FFFF
0270 0000
0270 7FFF
0270 8000
0271 FFFF
0272 0000
0272 7FFF
0272 8000
0273 FFFF
02740000
0274 7FFF
0274 8000
0275 FFFF
0276 0000
0276 03FF
0276 0400
0276 7FFF
0276 8000
0276 83FF
0276 8400
0276 FFFF
0277 0000
0277 03FF
0277 0400
0277 7FFF
0277 8000
0277 83FF
0278 0400
0277 FFFF
0278 0000
0278 03FF
0278 0400
0278 7FFF
0278 8000
0278 83FF
0278 8400
0278 FFFF
0279 0000
0279 03FF
0279 0400
0279 7FFF
0279 8000
0279 83FF
0279 8400
0279 FFFF
027A 0000
027A 03FF
027A 0400
027A 7FFF
027A 8000
027A 83FF
027A 8400
027A FFFF
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Physical 36 bit Address
Start
End
0 0258 0000
0 025B FFFF
0 025C 0000
0 025F FFFF
0 0260 0000
0 0260 1FFF
0 0260 2000
0 0260 3FFF
0 0260 4000
0 0260 5FFF
0 0260 6000
0 0260 7FFF
0 0260 8000
0 0260 9FFF
0 0260 A000
0 0260 BFFF
0 0260 C000
0 0260 DFFF
0 0260 E000
0 0260 FFFF
0 0261 0000
0 0261 FFFF
0 0262 0000
0 0262 03FF
0 0262 0400
0 0262 FFFF
0 0263 0000
0 0263 FFFF
0 0264 0000
0 0264 07FF
0 0264 0800
0 0264 FFFF
0 0265 0000
0 026F FFFF
0 0270 0000
0 0270 7FFF
0 0270 8000
0 0271 FFFF
0 0272 0000
0 0272 7FFF
0 0272 8000
0 0273 FFFF
0 02740000
0 0274 7FFF
0 0274 8000
0 0275 FFFF
0 0276 0000
0 0276 03FF
0 0276 0400
0 0276 7FFF
0 0276 8000
0 0276 83FF
0 0276 8400
0 0276 FFFF
0 0277 0000
0 0277 03FF
0 0277 0400
0 0277 7FFF
0 0277 8000
0 0277 83FF
0 0278 0400
0 0277 FFFF
0 0278 0000
0 0278 03FF
0 0278 0400
0 0278 7FFF
0 0278 8000
0 0278 83FF
0 0278 8400
0 0278 FFFF
0 0279 0000
0 0279 03FF
0 0279 0400
0 0279 7FFF
0 0279 8000
0 0279 83FF
0 0279 8400
0 0279 FFFF
0 027A 0000
0 027A 03FF
0 027A 0400
0 027A 7FFF
0 027A 8000
0 027A 83FF
0 027A 8400
0 027A FFFF
Multicore Fixed and Floating-Point System-on-Chip
Bytes
Description
256K
Reserved
256K
Reserved
8K
Secondary Chip Interrupt Contoller CIC 0
8K
Reserved
8K
Secondary Chip Interrupt Contoller CIC 1
8K
Reserved
8K
Secondary Chip Interrupt Contoller CIC 2
8K
Reserved
8K
Reserved
8K
Reserved
64K
Reserved
1K
Chip-level registers
63K
Reserved
64K
Reserved
2K
Semaphore
64K-2K
Reserved
704K
Reserved
32K
EDMA3 channel controller EDMA3CC0
96K
Reserved
32K
EDMA3 channel controller EDMA3CC1
96K
Reserved
32K
EDMA3 channel controller EDMA3CC2
96K
Reserved
1K
EDMA3CC0 transfer controller EDMA3TC0
31K
Reserved
1K
EDMA3CC0 transfer controller EDMA3TC1
31K
Reserved
1K
EDMA3CC1 transfer controller EDMA3TC0
31K
Reserved
1K
EDMA3CC1 transfer controller EDMA3TC1
31K
Reserved
1K
EDMA3CC1 transfer controller EDMA3TC2
31K
Reserved
1K
EDMA3CC1 transfer controller EDMA3TC3
31K
Reserved
1K
EDMA3CC2 transfer controllerEDMA3TC0
31K
Reserved
1K
EDMA3CC2 transfer controller EDMA3TC1
31K
Reserved
1K
EDMA3CC2 transfer controllerEDMA3TC2
31K
Reserved
1K
EDMA3CC2 transfer controller EDMA3TC3
31K
Reserved
TMS320C6670
SPRS689D—March 2012
Device Overview
25
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