Texas Instruments TMS320C6670 Data Manual page 43

Multicore fixed and floating-point system-on-chip
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Table 2-15
Terminal Functions — Signals and Control by Function (Part 3 of 12)
Signal Name
Ball No. Type IPD/IPU Description
ALTCORECLKP
AB29
ALTCORECLKN
AB28
SRIOSGMIICLKP
AJ16
SRIOSGMIICLKN
AH16
DDRCLKP
G29
DDRCLKN
H29
PCIECLKP
AH17
PCIECLKN
AJ17
MCMCLKP
W1
MCMCLKN
W2
SYSCLKOUT
AA26
CORECLKSEL
AB25
PACLKSEL
AD23
HOUT
AC18
NMI
AC25
LRESET
AE22
LRESETNMIEN
AC20
CORESEL0
AH15
CORESEL1
AC16
CORESEL2
AD15
RESETFULL
AE23
RESET
AC24
POR
AC19
RESETSTAT
AD18
BOOTCOMPLETE
AC21
PTV15
H24
DDRDQM0
E29
DDRDQM1
C27
DDRDQM2
A25
DDRDQM3
A22
DDRDQM4
A10
DDRDQM5
A8
DDRDQM6
B5
DDRDQM7
B2
DDRDQM8
A20
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I
Alternate System clock input to main PLL
I
I
RapidIO/SGMII reference clock to drive the RapidIO and SGMII SerDes
I
I
DDR reference clock input to DDR PLL
I
I
PCIe reference clock input to drive PCIe SerDes
I
I
HyperLink reference clock input to drive the HyperLink SerDes
I
System clock output to be used as a general purpose output clock for debug purposes
OZ
Down
Core clock select to select between SYSCLK and ALTCORECCLK to the main PLL
I
Down
IOZ
Down
PA clock select to choose between PASSCLK and the output of main PLL MUX (dependent on
CORECLKSEL pin) to the PA sub-system PLL
Interrupt output pulse created by IPCGRH
OZ
Up
Non-maskable Interrupt
I
Up
Local Reset
I
Up
Enable for core selects
I
Up
I
Down
Select for the target core for LRESET and NMI. For more details see
I
Down
Timing Requirements'' on page 178
I
Down
Full reset power-on reset
I
Up
Reset of non isolated portion on the device
I
Up
POR (power-on reset)
I
Reset status output
O
Up
Boot progress indication output
OZ
Down
A
PTV Compensation NMOS Reference Input. A precision resistor placed between the PTV15
pin and ground is used to closely tune the output impedance of the DDR interface drivers
to 50 Ohms. Presently, the recommended value for this 1% resistor is 45.3 Ohms.
OZ
OZ
OZ
OZ
OZ
DDR EMIF data masks
OZ
OZ
OZ
OZ
Multicore Fixed and Floating-Point System-on-Chip
DDR
TMS320C6670
SPRS689D—March 2012
Table 7-47 ''NMI and LRESET
Device Overview
43

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