Texas Instruments TMS320C6670 Data Manual page 184

TMS320C6670
Multicore Fixed and Floating-Point System-on-Chip
SPRS689D—March 2012
Table 7-52 MPU0 Registers (Part 3 of 3)
Offset Name
304h FLTSTAT
308h FLTCLR
End of Table 7-52
Table 7-53 MPU1 Registers
Offset Name
0h REVID
4h CONFIG
10h IRAWSTAT
14h IENSTAT
18h IENSET
1Ch IENCLR
20h EOI
200h PROG0_MPSAR
204h PROG0_MPEAR
208h PROG0_MPPA
210h PROG1_MPSAR
214h PROG1_MPEAR
218h PROG1_MPPA
220h PROG2_MPSAR
224h PROG2_MPEAR
228h PROG2_MPPA
230h PROG3_MPSAR
234h PROG3_MPEAR
238h PROG3_MPPA
300h FLTADDRR
304h FLTSTAT
308h FLTCLR
End of Table 7-53
Table 7-54 MPU2 Registers (Part 1 of 3)
Offset Name
0h REVID
4h CONFIG
10h IRAWSTAT
14h IENSTAT
18h IENSET
1Ch IENCLR
20h EOI
200h PROG0_MPSAR
204h PROG0_MPEAR
208h PROG0_MPPA
210h PROG1_MPSAR
184 TMS320C6670 Peripheral Information and Electrical Specifications
Description
Fault status
Fault clear
Description
Revision ID
Configuration
Interrupt raw status/set
Interrupt enable status/clear
Interrupt enable
Interrupt enable clear
End of interrupt
Programmable range 0, start address
Programmable range 0, end address
Programmable range 0, memory page protection attributes
Programmable range 1, start address
Programmable range 1, end address
Programmable range 1, memory page protection attributes
Programmable range 2, start address
Programmable range 2, end address
Programmable range 2, memory page protection attributes
Programmable range 3, start address
Programmable range 3, end address
Programmable range 3, memory page protection attributes
Fault address
Fault status
Fault clear
Description
Revision ID
Configuration
Interrupt raw status/set
Interrupt enable status/clear
Interrupt enable
Interrupt enable clear
End of interrupt
Programmable range 0, start address
Programmable range 0, end address
Programmable range 0, memory page protection attributes
Programmable range 1, start address
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