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MODEL:T1200H/HB
Page D-10
D.5 VARIOUS SIGNALS
The DCS contains the following different groups of signals;
- I/O Interface signals (23 lines)
- V-RAM signals (34 lines)
- Character
- Video signals (9 lines)
- Display mode selects signals (3 lines)
- Clock input (2 lines)
- Other signals (5 lines)
D.5.1 I/O interface signals
DIOSL0 : Display I/O Select (Input)
When this signal is "0", the CPU is enabled to access the I/O port
inside the gate array.
If this signal is "0", either IORD0 or IOWR0 becomes "1", and the
CPU is enabled to read or write the I/O port inside the gate array.
IORD0 : I/O Read (Input)
When this signal is low and DIOSL0 is also low, the data of the I/O
port is transferred to the CPU through the bus BD00-BD07.
IOWR0 : I/O Write (Input)
When this signal is low and DIOSLO is also low, the data from the
CPU is written to the selected 1/0 port inside the gate array
through the bus BD00-BD07.
DMESL0 : Display Memory Selected (Input)
When this signal is low, the CPU or DMAC is enabled to access the
video RAM. In the same condition, if either MERD0 or MEWR0 is low,
read and write operation is enabled.
MERD0 : I/O Read (Input)
When this signal is low and DMESL0 is low, reading operation to
V-RAM is executed, and the read data becomes effective in the bus
BD00-BD07.
MEWR0 : Memory Write (Input)
When this signal is low and DMESL0 is also low, the data on the bus
BD00-BD07 are written to the V-RAM.
Page D-11
Generater (CG) signals (16 lines)
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