Intel 81342 Developer's Manual page 45

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I n t r o d u c t i o n — I n t e l 8 1 3 4 1 a n d 8 1 3 4 2
F i g u r e 1
F i g u r e 1 . S i n g l e - C o r e I n t e l
72-Bit
I/F
PCI- X or PCI - E
PCI-E
D e c e m b e r 2 0 0 7
O r d e r N u m b e r : 3 1 5 0 3 7 - 0 0 2 U S
i s a b l o c k d i a g r a m o f t h e 8 1 3 4 1 1 - c o r e .
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8 1 3 4 1 I / O P r o c e s s o r F u n c t i o n a l B l o c k D i a g r a m
Bridge
Host Interface
(ATU )
Host Interface
( ATU)
Intel® 81341
I/O Processor
Intel
Timers
XScale®
Processor
(coreID=0H)
Interrupt
Controller
512K L2 Cache
128- Bit North Internal Bus
Multi - Port
Multi - Port
DDR II SDRAM
Controller
Memory Controller
Three
Application
DMA
Channels
128- Bit South Internal Bus
SMBus
PBI Unit
(Flash) Unit
SMBus
16-Bit I/F
I n t e l
SRAM
Memory
APB
Three I2C
Two
Bus
UARTs
Interface
Serial Bus
I2C Bus
B6169-01
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8 1 3 4 1 a n d 8 1 3 4 2 I / O P r o c e s s o r s
D e v e l o p e r ' s M a n u a l
4 5