Intel 81342 Developer's Manual page 899

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U A R T s — I n t e l
8 1 3 4 1 a n d 8 1 3 4 2
T a b l e 5 7 1 . U A R T x M o d e m C o n t r o l R e g i s t e r - ( U x M C R ) ( S h e e t 2 o f 2 )
s
3 1
t e
P
b u
r v
I O
r i
t t
A
e s
u t
I
P C
i b
n a
t r
A t
U n i t #
0
1
B i t
3
2
1
0
D e c e m b e r 2 0 0 7
O r d e r N u m b e r : 3 1 5 0 3 7 - 0 0 2 U S
2 8
2 4
r v
r v
r v
r v
r v
r v
r v
r v
r v
r v
n a
n a
n a
n a
n a
n a
n a
n a
n a
n a
®
I n t e l X S c a l e
C o r e i n t e r n a l b u s a d d r e s s
+ 2 3 1 0 H ( D L A B = x )
+ 2 3 5 0 H ( D L A B = x )
D e f a u l t
Interrupt Enable (IE): Global control all UART interrupts.
0 = interrupts disabled.
0
1 = interrupts enabled.
2
NOTE: This bit is not valid when in Loopback mode.
0
Preserved.
2
Request to Send (RTS):
Non-Autoflow mode: When not in Autoflow mode (AFE bit of MCR is clear), this bit
controls the Request-to-Send (RTS#) output pin.
0 = RTS# pin is 1
1 = RTS# pin is 0
0
2
Autoflow mode: When in Autoflow mode (AFE bit of MCR is set), auto-RTS is
enabled. RTS# behaves as follows:
• Auto-RTS disabled. Autoflow works only with auto-CTS.
• Auto-RTS enabled. Autoflow works with both auto-CTS and auto-RTS.
0
Reserved
2
2 0
1 6
1 2
r v
r v
r v
r v
r v
r v
r v
r v
r v
r v
n a
n a
n a
n a
n a
n a
n a
n a
n a
n a
A t t r i b u t e L e g e n d :
R V = R e s e r v e d
P R = P r e s e r v e d
R S = R e a d / S e t
D e s c r i p t i o n
I n t e l
8
4
r v
r v
r v
r v
r v
r w
r w
r w
p r
r w
n a
n a
n a
n a
n a
n a
n a
n a
n a
n a
R W = R e a d / W r i t e
R C = R e a d C l e a r
R O = R e a d O n l y
N A = N o t A c c e s s i b l e
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8 1 3 4 1 a n d 8 1 3 4 2 I / O P r o c e s s o r s
D e v e l o p e r ' s M a n u a l
0
r v
n a
8 9 9

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