Intel 81342 Developer's Manual page 162

2 . 1 3 . 1 5 I n b o u n d A T U B a s e A d d r e s s R e g i s t e r 1 - I A B A R 1
T h e I n b o u n d A T U B a s e A d d r e s s R e g i s t e r 1 ( I A B A R 1 ) t o g e t h e r w i t h t h e I n b o u n d A T U
U p p e r B a s e A d d r e s s R e g i s t e r 1 ( I A U B A R 1 ) d e f i n e s t h e b l o c k o f m e m o r y a d d r e s s e s
w h e r e t h e i n b o u n d t r a n s l a t i o n w i n d o w 1 b e g i n s . T h e i n b o u n d A T U d e c o d e s a n d
f o r w a r d s t h e b u s r e q u e s t t o t h e 8 1 3 4 1 a n d 8 1 3 4 2 i n t e r n a l b u s w i t h a t r a n s l a t e d
a d d r e s s t o m a p i n t o 8 1 3 4 1 a n d 8 1 3 4 2 l o c a l m e m o r y . T h e I A B A R 1 a n d I A U B A R 1 d e f i n e
t h e b a s e a d d r e s s a n d d e s c r i b e s t h e r e q u i r e d m e m o r y b l o c k s i z e ; s e e
" D e t e r m i n i n g B l o c k S i z e s f o r B a s e A d d r e s s R e g i s t e r s " o n p a g e 1 6 9
o f t h e I A B A R 1 i s e i t h e r r e a d / w r i t e b i t s o r r e a d o n l y w i t h a v a l u e o f 0 d e p e n d i n g o n t h e
v a l u e l o c a t e d w i t h i n t h e I A L R 1 . T h i s c o n f i g u r a t i o n a l l o w s t h e I A B A R 1 t o b e p r o g r a m m e d
p e r P C I L o c a l B u s S p e c i f i c a t i o n , R e v i s i o n 2 . 3 .
T h e p r o g r a m m e d v a l u e w i t h i n t h e b a s e a d d r e s s r e g i s t e r m u s t c o m p l y w i t h t h e P C I
p r o g r a m m i n g r e q u i r e m e n t s f o r a d d r e s s a l i g n m e n t . R e f e r t o t h e P C I L o c a l B u s
S p e c i f i c a t i o n , R e v i s i o n 2 . 3 f o r a d d i t i o n a l i n f o r m a t i o n o n p r o g r a m m i n g b a s e a d d r e s s
r e g i s t e r s .
W h e n I A L R 1 i s c l e a r e d p r i o r t o h o s t c o n f i g u r a t i o n , t h e u s e r s h o u l d a l s o c l e a r t h e
W a r n i n g :
P r e f e t c h a b l e I n d i c a t o r a n d t h e T y p e I n d i c a t o r . A s s u m i n g I A L R 1 i s n o t c l e a r e d :
c. Since non prefetchable memory windows can never be placed above the 4 Gbyte address boundary,
when the Prefetchable Indicator is cleared prior to host configuration, the user should also set the
Type Indicator for 32 bit addressability.
d. For compliance to the PCI-X Protocol Addendum to the PCI Local Bus Specification, Revision 2.0,
when the Prefetchable Indicator is set prior to host configuration, the user should also set the Type
Indicator for 64 bit addressability. This is the default for IABAR1.
T a b l e 3 7 . I n b o u n d A T U B a s e A d d r e s s R e g i s t e r 1 - I A B A R 1
31
IOP
rw rw rw
Attributes
PCI
rw rw rw
Attributes
R e g i s t e r O f f s e t
+ 0 1 8 H
B i t D e f a u l t
3 1 : 1 2 0 0 0 0 0 H T r a n s l a t i o n B a s e A d d r e s s 1 - T h e s e b i t s d e f i n e t h e a c t u a l l o c a t i o n o f w i n d o w 1 o n t h e P C I b u s .
1 1 : 0 4 0 0 H R e s e r v e d .
0 3 0 P r e f e t c h a b l e I n d i c a t o r - W h e n s e t , d e f i n e s t h e m e m o r y s p a c e a s p r e f e t c h a b l e .
2
T y p e I n d i c a t o r - D e f i n e s t h e w i d t h o f t h e a d d r e s s a b i l i t y f o r t h i s m e m o r y w i n d o w :
0 2 : 0 1 0 0
0 0 - M e m o r y W i n d o w i s l o c a t a b l e a n y w h e r e i n 3 2 b i t a d d r e s s s p a c e
2
1 0 - M e m o r y W i n d o w i s l o c a t a b l e a n y w h e r e i n 6 4 b i t a d d r e s s s p a c e
M e m o r y S p a c e I n d i c a t o r - T h i s b i t f i e l d d e s c r i b e s m e m o r y o r I / O s p a c e b a s e a d d r e s s . T h e A T U d o e s n o t
0 0 0
o c c u p y I / O s p a c e , t h u s t h i s b i t m u s t b e z e r o .
2
®
I n t e l 8 1 3 4 1 a n d 8 1 3 4 2 I / O P r o c e s s o r s
D e v e l o p e r ' s M a n u a l
1 6 2
28 24 20
rw rw rw rw rw rw rw rw rw rw
rw rw rw rw rw rw rw rw rw rw
®
I n t e l 8 1 3 4 1 a n d 8 1 3 4 2 — A d d r e s s T r a n s l a t i o n U n i t ( P C I - X )
16 12
rw rw rw rw rw rw rw rv rv rv
rw rw rw rw rw rw rw rv rv rv
A t t r i b u t e L e g e n d :
R V = R e s e r v e d
P R = P r e s e r v e d
R S = R e a d / S e t
D e s c r i p t i o n
S e c t i o n 2 . 1 3 . 2 3 ,
. B i t s 3 1 t h r o u g h 1 2
8 4 0
rv rv rv rv rv rw rw ro ro
rv rv rv rv rv ro ro ro ro
R W = R e a d / W r i t e
R C = R e a d C l e a r
R O = R e a d O n l y
N A = N o t A c c e s s i b l e
D e c e m b e r 2 0 0 7
O r d e r N u m b e r : 3 1 5 0 3 7 - 0 0 2 U S