General Design Recommendations; Transitioning From Intel 440Bx Agpset To Intel 440Gx Agpset Design - Intel 440GX Design Manual

1.4.2

General Design Recommendations

1. Intel recommends using an industry standard programmable Voltage Regulator Module
(VRM) installed in a VRM header or an onboard programmable voltage regulator designed for
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Intel
2. Systems should be capable of varying the system bus to processor core frequency ratio per the
System Bus to Core Frequency Multiplier Configuration table of the Intel
processor datasheet. The Intel
the internal clock multiplier ratio: LINT[0]/INTR, IGNNE#, A20M#, LINT[1]/NMI. Follow
the recommendations in this document to ensure that adequate hold times are met on the
strapping signals. Ensure the output of the strapping logic is a Vcc
to the Slot 1 connector. This can be accomplished using an open-drain output driver with pull-
ups to Vcc
3. Please prepare for additional thermal margin for increases of 1-5W for higher performance or
otherwise enhanced processor.
4. Motherboard designs targeted for system integrators should design to the Boxed Intel
Pentium
Pentium
physical clearance on the motherboard.
5. Motherboard designs should incorporate a retention mechanism, retention mechanism attach
mount and heatsink support mounting holes and keep out areas for the Intel
processor and boxed Intel
1.4.3 Transitioning from Intel 440BX AGPset to Intel 440GX
AGPset Design
1. The 82443GX supports 2GB using 128M or 256M memory technology. The design guidelines
for MAA14 and MAB14 are the same as MAA-13 and MAB-13 on the 82443BX.
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2. Intel
3. There is no 3 DIMM support with the Intel 440GX AGPset.
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Intel 440GX AGPset Design Guide
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Pentium II processors.
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Pentium
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2.5
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II processor electrical, mechanical and thermal specifications provided in the Intel
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II processor datasheet, most notably the required fan power header, fan/heatsink
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Pentium
440GX AGPset supports 100 MHz system bus and 100 MHz SDRAM Memory only.
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II processor uses the following signals to configure
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II processor.
Introduction
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Pentium II
logic level for connection
2.5
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Pentium II
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